(→Overview) |
|||
(9 intermediate revisions by the same user not shown) | |||
Line 33: | Line 33: | ||
== Overview == | == Overview == | ||
− | Kunpeng, also known as Hi16xx, is a series of {{arch|64}} [[ARM]] server microprocessors designed by [[Huawei]]. First introduced in 2015, those processors are geared towards highly-threaded or high-throughput applications. Those processors | + | [[File:kunpeng roadmap (2019).jpeg|right|thumb|Roadmap]] |
+ | Kunpeng, also known as Hi16xx, is a series of {{arch|64}} [[ARM]] server microprocessors designed by [[Huawei]]. First introduced in 2015, those processors are geared towards highly-threaded or high-throughput applications. Those processors were only found in the HiSilicon evaluation development boards and in a few limited series of Huawei servers. Huawei expanded their server offerings in 2018 and 2019 with the TaiShan line of servers. In early 2019, with the introduction of the 920 series, Huawei rebranded the series as the Kunpeng. | ||
=== Naming scheme === | === Naming scheme === | ||
Line 70: | Line 71: | ||
{{comp table end}} | {{comp table end}} | ||
=== 920 Series === | === 920 Series === | ||
+ | {{see also|hisilicon/microarchitectures/taishan v110|l1=Taishan v110 microarchitecture}} | ||
[[File:hi1620 exhibit sign.jpg|right|thumb|Hi1620 on exhibit.]] | [[File:hi1620 exhibit sign.jpg|right|thumb|Hi1620 on exhibit.]] | ||
− | In late 2018, Huawei announced the 920 series, also known as the Hi1620. Manufactured on [[TSMC]]'s [[7 nm process]], those processors are based on the company's custom-designed {{hisilicon|Taishan|l=arch}} ARMv 8.2 cores operating at up to 2.6 GHz. All models support up to eight channels of DDR4 memory and up | + | In late 2018, Huawei announced the Kunpeng 920 series, also known as the Hi1620. Manufactured on [[TSMC]]'s [[7 nm process]], those processors are based on the company's custom-designed {{hisilicon|Taishan v110|l=arch}} ARMv 8.2 cores operating at up to 2.6 GHz. All models support up to eight channels of DDR4 memory and up to four-way SMP. |
+ | * '''Proc:''' [[7 nm process]] | ||
* '''ISA:''' [[ARMv8.2]] | * '''ISA:''' [[ARMv8.2]] | ||
* '''TDP:''' 100 W - 200 W | * '''TDP:''' 100 W - 200 W | ||
* '''Mem:''' Octa-channel DDR4-2933 memory | * '''Mem:''' Octa-channel DDR4-2933 memory | ||
− | * '''I/O:''' x40 PCIe Gen 4, 2x 100GbE, RoCEv2 | + | * '''I/O:''' x40 PCIe Gen 4 with [[CCIX]] support, 2x 100GbE, RoCEv2, 4x USB 3.0, x16 SAS 3.0, 2x SATA 3.0 |
<!-- NOTE: | <!-- NOTE: | ||
This table is generated automatically from the data in the actual articles. | This table is generated automatically from the data in the actual articles. | ||
Line 86: | Line 89: | ||
{{comp table start}} | {{comp table start}} | ||
<table class="comptable sortable tc4"> | <table class="comptable sortable tc4"> | ||
− | {{comp table header|main| | + | {{comp table header|main|6:List of Hi1620 Processors}} |
− | + | {{comp table header|cols|Launched|Cores|Arch|%Frequency|L3|TDP}} | |
− | {{comp table header|cols|Launched|Cores|Arch|%Frequency|L3}} | ||
{{#ask: [[Category:microprocessor models by hisilicon]] [[family::Hi16xx]] [[series::920]] | {{#ask: [[Category:microprocessor models by hisilicon]] [[family::Hi16xx]] [[series::920]] | ||
|?full page name | |?full page name | ||
Line 97: | Line 99: | ||
|?base frequency#GHz | |?base frequency#GHz | ||
|?l3$ size | |?l3$ size | ||
+ | |?tdp | ||
|format=template | |format=template | ||
|template=proc table 3 | |template=proc table 3 | ||
− | |userparam= | + | |userparam=8 |
|mainlabel=- | |mainlabel=- | ||
}} | }} | ||
Line 105: | Line 108: | ||
</table> | </table> | ||
{{comp table end}} | {{comp table end}} | ||
+ | |||
+ | === 930 Series === | ||
+ | [[File:hislicon kunpeng roadmap to 930.png|thumb|right|Kunpeng 930 Roadmap]] | ||
+ | Next-generation SoCs are the Hi1630 which are branded as Kunpeng 930 series. Those chips are expected to feature a higher-performance core with higher frequencies, simultaneous multithreading support, and Arm’s {{arm|Scalable Vector Extension}} (SVE) extension. Those chips will are also planned to move to DDR5 memory. | ||
+ | |||
+ | === 950 Series === | ||
+ | The Kunpeng 950 series will be the follow-up to the 930 and are planned for the 2023 timeframe. | ||
== See also == | == See also == |
Latest revision as of 05:07, 13 October 2019
Kunpeng | |
![]() | |
Hi1616 Chip | |
Developer | HiSilicon, ARM Holdings |
Manufacturer | TSMC |
Type | System on chips |
Introduction | 2014 (announced) |
ISA | ARM |
Word size | 64 bit 8 octets
16 nibbles |
Technology | CMOS |
Kunpeng (Hi16xx) is a family of 64-bit ARM multi-core server SoCs designed for Huawei line of enterprise ARM servers.
Contents
Overview[edit]
Kunpeng, also known as Hi16xx, is a series of 64-bit ARM server microprocessors designed by Huawei. First introduced in 2015, those processors are geared towards highly-threaded or high-throughput applications. Those processors were only found in the HiSilicon evaluation development boards and in a few limited series of Huawei servers. Huawei expanded their server offerings in 2018 and 2019 with the TaiShan line of servers. In early 2019, with the introduction of the 920 series, Huawei rebranded the series as the Kunpeng.
Naming scheme[edit]
Models[edit]
Older models[edit]
Older models were based on Arm's mobile Cortex cores. Those models range from 16 to 32 cores and offer up to four memory channels.
List of Older Hi16xx Processors | |||||
---|---|---|---|---|---|
Main processor | |||||
Model | Launched | Cores | Arch | Frequency | L3 |
Hi1610 | 2015 | 16 | Cortex-A57 | 2.1 GHz 2,100 MHz 2,100,000 kHz | 16 MiB 16,384 KiB 16,777,216 B 0.0156 GiB |
Hi1612 | 4 June 2016 | 32 | Cortex-A57 | 2.1 GHz 2,100 MHz 2,100,000 kHz | 32 MiB 32,768 KiB 33,554,432 B 0.0313 GiB |
Hi1616 | August 2017 | 32 | Cortex-A72 | 2.4 GHz 2,400 MHz 2,400,000 kHz | 32 MiB 32,768 KiB 33,554,432 B 0.0313 GiB |
Count: 3 |
920 Series[edit]
- See also: Taishan v110 microarchitecture
In late 2018, Huawei announced the Kunpeng 920 series, also known as the Hi1620. Manufactured on TSMC's 7 nm process, those processors are based on the company's custom-designed Taishan v110 ARMv 8.2 cores operating at up to 2.6 GHz. All models support up to eight channels of DDR4 memory and up to four-way SMP.
- Proc: 7 nm process
- ISA: ARMv8.2
- TDP: 100 W - 200 W
- Mem: Octa-channel DDR4-2933 memory
- I/O: x40 PCIe Gen 4 with CCIX support, 2x 100GbE, RoCEv2, 4x USB 3.0, x16 SAS 3.0, 2x SATA 3.0
List of Hi1620 Processors | ||||||
---|---|---|---|---|---|---|
Model | Launched | Cores | Arch | Frequency | L3 | TDP |
920-3226 | 26 April 2019 | 32 | TaiShan v110 | 2.6 GHz 2,600 MHz 2,600,000 kHz | 32 MiB 32,768 KiB 33,554,432 B 0.0313 GiB | 120 W 120,000 mW 0.161 hp 0.12 kW |
920-4826 | 26 April 2019 | 48 | TaiShan v110 | 2.6 GHz 2,600 MHz 2,600,000 kHz | 48 MiB 49,152 KiB 50,331,648 B 0.0469 GiB | 158 W 158,000 mW 0.212 hp 0.158 kW |
920-6426 | 7 January 2019 | 64 | TaiShan v110 | 2.6 GHz 2,600 MHz 2,600,000 kHz | 64 MiB 65,536 KiB 67,108,864 B 0.0625 GiB | 195 W 195,000 mW 0.261 hp 0.195 kW |
Count: 3 |
930 Series[edit]
Next-generation SoCs are the Hi1630 which are branded as Kunpeng 930 series. Those chips are expected to feature a higher-performance core with higher frequencies, simultaneous multithreading support, and Arm’s Scalable Vector Extension (SVE) extension. Those chips will are also planned to move to DDR5 memory.
950 Series[edit]
The Kunpeng 950 series will be the follow-up to the 930 and are planned for the 2023 timeframe.
See also[edit]
- Cavium's ThunderX2
- Qualcomm's Centriq
- Intel's Xeon Scalable
designer | HiSilicon + and ARM Holdings + |
first announced | 2014 + |
full page name | hisilicon/kunpeng + |
instance of | system on a chip family + |
instruction set architecture | ARM + |
main designer | HiSilicon + |
manufacturer | TSMC + |
name | Kunpeng + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |