From WikiChip
Difference between revisions of "intel/cpuid"
< intel

(→‎CPUIDs)
(Diamond Rapids: Family 19, not 6)
 
(81 intermediate revisions by 12 users not shown)
Line 1: Line 1:
−
{{intel title|CPUID}}
+
{{intel title|CPUID}}{{x86 isa main}}
 
Below is a list of '''Intel's {{x86|CPUID}}''' broken down by their respective core names and [[microarchitecture]]:
 
Below is a list of '''Intel's {{x86|CPUID}}''' broken down by their respective core names and [[microarchitecture]]:
  
 
== CPUIDs==
 
== CPUIDs==
−
{{work-in-progress}}
+
=== Family 19 ===
 +
{| class="wikitable"
 +
! Microarchitecture !! Core !! Extended Family !! Family !! Extended Model !! Model
 +
|-
 +
| {{intel|Diamond Rapids|l=arch}} || || 0x4 || 0xF || 0x0 || 0x1 || [[Family 19 Model 1]]
 +
|}
  
 +
=== Family 15 ===
 
{| class="wikitable"
 
{| class="wikitable"
 
! Microarchitecture !! Core !! Extended Family !! Family !! Extended Model !! Model
 
! Microarchitecture !! Core !! Extended Family !! Family !! Extended Model !! Model
 
|-
 
|-
−
| colspan="7" style="text-align: center;" | <small>[[Big Cores]] (Client)</small>
+
| rowspan="5" | {{intel|Netburst|l=arch}} || || 0 || 0xF || 0x0 || 0x6 || [[Family 15 Model 6]]
 +
|-
 +
| {{intel|Prescott|l=core}} || 0 || 0xF || 0x0 || 0x4 || [[Family 15 Model 4]]
 +
|-
 +
| {{intel|Prescott|l=core}} || 0 || 0xF || 0x0 || 0x3 || [[Family 15 Model 3]]
 +
|-
 +
| {{intel|Northwood|l=core}} || 0 || 0xF || 0x0 || 0x2 || [[Family 15 Model 2]]
 +
|-
 +
| {{intel|Willamette|l=core}} || 0 || 0xF || 0x0 || 0x1 || [[Family 15 Model 1]]
 +
|}
 +
 
 +
=== Family 11 ===
 +
{| class="wikitable"
 +
! Microarchitecture !! Core !! Extended Family !! Family !! Extended Model !! Model
 +
|-
 +
| {{intel|Knights Ferry|l=arch}} || || 0 || 0xB || 0x0 || 0x0 || [[Family 11 Model 0]]
 +
|-
 +
| {{intel|Knights Corner|l=arch}} || || 0 || 0xB || 0x0 || 0x1 || [[Family 11 Model 1]]
 +
|}
 +
 
 +
=== Family 6 ===
 +
==== [[Big Cores]] (Client) ====
 +
Intel's client big cores refers to Intel mainstream SoCs that ship in most tablets, laptops, and desktop devices.
 +
 +
{| class="wikitable"
 +
! Microarchitecture !! Core !! Extended Family !! Family !! Extended Model !! Model
 +
|-
 +
| {{intel|Meteor Lake|l=arch}}
 +
|-
 +
| rowspan="2" | {{intel|Raptor Lake|l=arch}} || {{intel|Raptor Lake S|S|l=core}} || 0 || 0x6 || 0xB || 0x7 || [[Family 6 Model 183]]
 +
|-
 +
| {{intel|Raptor Lake P|P|l=core}} || 0 || 0x6 || 0xB || 0xA || [[Family 6 Model 186]]
 +
|-
 +
| rowspan="2" | {{intel|Alder Lake|l=arch}} || {{intel|Alder Lake S|S|l=core}} || 0 || 0x6 || 0x9 || 0x7 || [[Family 6 Model 151]]
 +
|-
 +
| {{intel|Alder Lake P|P|l=core}} || 0 || 0x6 || 0x9 || 0xA || [[Family 6 Model 154]]
 +
|-
 +
| {{intel|Rocket Lake|l=arch}} || {{intel|Rocket Lake S|S|l=core}} || 0 || 0x6 || 0xA || 0x7 || [[Family 6 Model 167]]
 +
|-
 +
| rowspan="2" | {{intel|Tiger Lake|l=arch}} || {{intel|Tiger Lake H|H|l=core}} || 0 || 0x6 || 0x8 || 0xD || [[Family 6 Model 141]]
 +
|-
 +
| {{intel|Tiger Lake U|U|l=core}} || 0 || 0x6 || 0x8 || 0xC || [[Family 6 Model 140]]
 +
|-
 +
| rowspan="2" | {{intel|Ice Lake (Client)|l=arch}} || {{intel|Ice Lake U|U|l=core}} || 0 || 0x6 || 0x7 || 0xE || [[Family 6 Model 126]]
 +
|-
 +
| {{intel|Ice Lake Y|Y|l=core}} || 0 || 0x6 || 0x7 || 0xE || [[Family 6 Model 126]]
 
|-
 
|-
−
| {{intel|Ice Lake (Client)|l=arch}}
+
| rowspan="2" | {{intel|Comet Lake|l=arch}} || {{intel|Comet Lake S|S|l=core}}, {{intel|Comet Lake H|H|l=core}} || 0 || 0x6 || 0xA || 0x5 || [[Family 6 Model 165]]
 
|-
 
|-
−
| {{intel|Whiskey Lake|l=arch}}
+
| {{intel|Comet Lake U|U|l=core}} || rowspan="3" | 0 || rowspan="3" | 0x6 || rowspan="3" | 0x8 || rowspan="3" | 0xE || rowspan="3" | [[Family 6 Model 142]]
 +
|-
 +
| {{intel|Amber Lake|l=arch}} || {{intel|Amber Lake Y|Y|l=core}}
 +
|-
 +
| {{intel|Whiskey Lake|l=arch}} || {{intel|Whiskey Lake U|U|l=core}}
 
|-
 
|-
 
| {{intel|Cannon Lake|l=arch}} || {{intel|Cannon Lake U|U|l=core}} || 0 || 0x6 || 0x6 || 0x6 || [[Family 6 Model 102]]
 
| {{intel|Cannon Lake|l=arch}} || {{intel|Cannon Lake U|U|l=core}} || 0 || 0x6 || 0x6 || 0x6 || [[Family 6 Model 102]]
 
|-
 
|-
−
| {{intel|Coffee Lake|l=arch}} || {{intel|Coffee Lake S|S|l=core}}, {{intel|Coffee Lake H|H|l=core}} || 0 || 0x6 || 0x9 || 0xE || [[Family 6 Model 158]]
+
| rowspan="2" | {{intel|Coffee Lake|l=arch}} || {{intel|Coffee Lake S|S|l=core}}, {{intel|Coffee Lake H|H|l=core}}, {{intel|Coffee Lake E|E|l=core}} || 0 || 0x6 || 0x9 || 0xE || [[Family 6 Model 158]]
 +
|-
 +
| {{intel|Coffee Lake U|U|l=core}} || 0 || 0x6 || 0x8 || 0xE || [[Family 6 Model 142]]
 
|-
 
|-
 
| rowspan="2" | {{intel|Kaby Lake|l=arch}} || {{intel|Kaby Lake DT|DT|l=core}}, {{intel|Kaby Lake H|H|l=core}}, {{intel|Kaby Lake S|S|l=core}}, {{intel|Kaby Lake X|X|l=core}} || 0 || 0x6 || 0x9 || 0xE || [[Family 6 Model 158]]
 
| rowspan="2" | {{intel|Kaby Lake|l=arch}} || {{intel|Kaby Lake DT|DT|l=core}}, {{intel|Kaby Lake H|H|l=core}}, {{intel|Kaby Lake S|S|l=core}}, {{intel|Kaby Lake X|X|l=core}} || 0 || 0x6 || 0x9 || 0xE || [[Family 6 Model 158]]
Line 26: Line 83:
 
| {{intel|Skylake Y|Y|l=core}}, {{intel|Skylake U|U|l=core}} || 0 || 0x6 || 0x4 || 0xE || [[Family 6 Model 78]]
 
| {{intel|Skylake Y|Y|l=core}}, {{intel|Skylake U|U|l=core}} || 0 || 0x6 || 0x4 || 0xE || [[Family 6 Model 78]]
 
|-
 
|-
−
| rowspan="2" | {{intel|Broadwell (Client)|l=arch}} || {{intel|Broadwell C|C|l=core}} || 0 || 0x6 || 0x4 || 0x7 || [[Family 6 Model 71]]
+
| rowspan="3" | {{intel|Broadwell (Client)|l=arch}} || {{intel|Broadwell C|C|l=core}}, {{intel|Broadwell W|W|l=core}} || 0 || 0x6 || 0x4 || 0x7 || [[Family 6 Model 71]]
 
|-
 
|-
−
| {{intel|Broadwell S|S|l=core}} || 0 || 0x6 || 0x3 || 0xD || [[Family 6 Model 61]]
+
| {{intel|Broadwell U|U|l=core}}, {{intel|Broadwell Y|Y|l=core}}, {{intel|Broadwell S|S|l=core}} || 0 || 0x6 || 0x3 || 0xD || [[Family 6 Model 61]]
 +
|-
 +
| {{intel|Broadwell H|H|l=core}} || 0 || 0x6 || 0x4 || 0x7 || [[Family 6 Model 71]]
 
|-
 
|-
 
| rowspan="3" | {{intel|Haswell (Client)|l=arch}} || {{intel|Haswell GT3E|GT3E|l=core}} || 0 || 0x6 || 0x4 || 0x6 || [[Family 6 Model 70]]
 
| rowspan="3" | {{intel|Haswell (Client)|l=arch}} || {{intel|Haswell GT3E|GT3E|l=core}} || 0 || 0x6 || 0x4 || 0x6 || [[Family 6 Model 70]]
Line 36: Line 95:
 
| {{intel|Haswell S|S|l=core}} || 0 || 0x6 || 0x3 || 0xC || [[Family 6 Model 60]]
 
| {{intel|Haswell S|S|l=core}} || 0 || 0x6 || 0x3 || 0xC || [[Family 6 Model 60]]
 
|-
 
|-
−
| {{intel|Ivy Bridge (Client)|l=arch}} || {{intel|Ivy Bridge M|M|l=core}}, {{intel|Ivy Bridge H|H|l=core}} || 0 || 0x6 || 0x3 || 0xA || [[Family 6 Model 58]]
+
| {{intel|Ivy Bridge (Client)|l=arch}} || {{intel|Ivy Bridge M|M|l=core}}, {{intel|Ivy Bridge H|H|l=core}}, {{intel|Gladden|l=core}} || 0 || 0x6 || 0x3 || 0xA || [[Family 6 Model 58]]
 
|-
 
|-
−
| {{intel|Sandy Bridge (Client)|l=arch}} || {{intel|Sandy Bridge M|M|l=core}}, {{intel|Sandy Bridge H|H|l=core}} || 0 || 0x6 || 0x2 || 0xA || [[Family 6 Model 42]]
+
| {{intel|Sandy Bridge (Client)|l=arch}} || {{intel|Sandy Bridge M|M|l=core}}, {{intel|Sandy Bridge H|H|l=core}}, {{intel|Sandy Bridge Celeron|Celeron|1=celeron}} || 0 || 0x6 || 0x2 || 0xA || [[Family 6 Model 42]]
 
|-
 
|-
−
| {{intel|Westmere|l=arch}} || {{intel|Arrandale|l=core}} || 0 || 0x6 || 0x2 || 0x5 || [[Family 6 Model 37]]
+
| {{intel|Westmere (Client)|l=arch}} || {{intel|Arrandale|l=core}}, {{intel|Clarkdale|l=core}} || 0 || 0x6 || 0x2 || 0x5 || [[Family 6 Model 37]]
 
|-
 
|-
−
| colspan="7" style="text-align: center;" | <small>[[Big Cores]] (Server)</small>
+
| rowspan="2" | {{intel|Nehalem (Client)|l=arch}} || <s>{{intel|Auburndale|l=core}}</s>, <s>{{intel|Havendale|l=core}}</s> || 0 || 0x6 || 0x1 ||0xF || [[Family 6 Model 31]]
 
|-
 
|-
−
| {{intel|Granite Rapids|l=arch}}
+
| {{intel|Clarksfield|l=core}} || 0 || 0x6 || 0x1 || 0xE || [[Family 6 Model 30]]
 
|-
 
|-
−
| {{intel|Sapphire Rapids|l=arch}}
+
| {{intel|Penryn (Client)|l=arch}} || {{intel|Penryn|l=core}}, {{intel|Wolfdale|l=core}}, {{intel|Yorkfield|l=core}} || 0 || 0x6 || 0x1 || 0x7 || [[Family 6 Model 23]]
 
|-
 
|-
−
| {{intel|Ice Lake (Server)|l=arch}}
+
| rowspan="2" | {{intel|Core (Client)|l=arch}} || {{intel|Merom L|l=core}} || 0 || 0x6 || 0x1 ||  0x6 || [[Family 6 Model 22]]
 
|-
 
|-
−
| {{intel|Cascade Lake|l=arch}} || {{intel|Cascade Lake X|X|l=core}}, {{intel|Cascade Lake SP|SP|l=core}}
+
| {{intel|Merom|l=core}} || 0 || 0x6 || 0x0 || 0xF || [[Family 6 Model 15]]
 
|-
 
|-
−
| {{intel|Skylake (Server)|l=arch}} || {{intel|Skylake X|X|l=core}}, {{intel|Skylake SP|SP|l=core}} || 0 || 0x6 || 0x5 || 0x5 || [[Family 6 Model 85]]
+
| {{intel|Modified Pentium M|l=arch}} || {{intel|Yonah|l=core}} || 0 || 0x6 || 0x0 || 0xE || [[Family 6 Model 14]]
 
|-
 
|-
−
| rowspan="2" | {{intel|Broadwell (Server)|l=arch}} || {{intel|Broadwell E|E|l=core}} || 0 || 0x6 || 0x4 || 0xF || [[Family 6 Model 79]]
+
| rowspan="3" | {{intel|Pentium M|l=arch}} || {{intel|Tolapai|l=core}} || 0 || 0x6 || 0x1 || 0x5 || [[Family 6 Model 21]]
 
|-
 
|-
−
| {{intel|Broadwell DE|DE|l=core}} || 0 || 0x6 || 0x5 || 0x6 || [[Family 6 Model 86]]
+
| {{intel|Dothan|l=core}} || 0 || 0x6 || 0x0 || 0xD || [[Family 6 Model 13]]
 
|-
 
|-
−
| {{intel|Haswell (Server)|l=arch}} || {{intel|Haswell E|E|l=core}} || 0 || 0x6 || 0x3 || 0xF || [[Family 6 Model 63]]
+
| {{intel|Banias|l=core}} || 0 || 0x6 || 0x0 || 0x9 || [[Family 6 Model 9]]
 
|-
 
|-
−
| {{intel|Ivy Bridge (Server)|l=arch}} || {{intel|Ivy Bridge E|E|l=core}} || 0 || 0x6 || 0x3 || 0xE || [[Family 6 Model 62]]
+
| rowspan="7" | {{intel|P6|l=arch}} || {{intel|Tualatin|l=core}} || 0 || 0x6 || 0x0 || 0xB || [[Family 6 Model 11]]
 
|-
 
|-
−
| {{intel|Sandy Bridge (Server)|l=arch}} || {{intel|Sandy Bridge E|E|l=core}} || 0 || 0x6 || 0x2 || 0xD || [[Family 6 Model 45]]
+
| {{intel|Coppermine|l=core}}, {{intel|Coppermine T|l=core}} || 0 || 0x6 || 0x0 || 0x8 || [[Family 6 Model 8]]
 
|-
 
|-
−
| {{intel|Westmere (Server)|l=arch}} || {{intel|Gulftown|l=core}} || 0 || 0x6 ||  
+
| {{intel|Katmai|l=core}} || 0 || 0x6 || 0x0 || 0x7 || [[Family 6 Model 7]]
 
|-
 
|-
−
| {{intel|Nehalem (Server)|l=arch}} || {{intel|Bloomfield|l=core}} || 0 || 0x6 || 0x1 || 0xA || [[Family 6 Model 26]]
+
| || 0 || 0x6 || 0x0 || 0x6 || [[Family 6 Model 6]]
 
|-
 
|-
−
| colspan="7" style="text-align: center;" | <small>[[Little Cores]]</small>
+
| || 0 || 0x6 || 0x0 || 0x5 || [[Family 6 Model 5]]
 +
|-
 +
| || 0 || 0x6 || 0x0 || 0x3 || [[Family 6 Model 3]]
 +
|-
 +
| || 0 || 0x6 || 0x0 || 0x1 || [[Family 6 Model 1]]
 +
|}
 +
 
 +
==== [[Big Cores]] (Server) ====
 +
Intel's server big cores refers to Intel workstation and data center SoCs that ship in most enterprise desktops, workstations, and servers.
 +
 
 +
{| class="wikitable"
 +
! Microarchitecture !! Core !! Extended Family !! Family !! Extended Model !! Model
 +
|-
 +
| {{intel|Granite Rapids|l=arch}} || || || || || ||
 +
|-
 +
| {{intel|Emerald Rapids|l=arch}} || ? || 0 || 0x6 || 0xC || 0xF || [[Family 6 Model 207]]
 +
|-
 +
| {{intel|Sapphire Rapids|l=arch}} || ? || 0 || 0x6 || 0x8 || 0xF || [[Family 6 Model 143]]
 +
|-
 +
| rowspan="2" | {{intel|Ice Lake (Server)|l=arch}} || {{intel|Ice Lake DE|DE|l=core}} || 0 || 0x6 || 0x6 || 0xC || [[Family 6 Model 108]]
 +
|-
 +
| {{intel|Ice Lake SP|SP|l=core}} || 0 || 0x6 || 0x6 || 0xA || [[Family 6 Model 106]]
 +
|-
 +
| {{intel|Cooper Lake|l=arch}} || ? || rowspan="3" | 0 || rowspan="3" | 0x6 || rowspan="3" | 0x5 || rowspan="3" | 0x5 || rowspan="3" | [[Family 6 Model 85]]
 +
|-
 +
| {{intel|Cascade Lake|l=arch}} || {{intel|Cascade Lake SP|SP|l=core}}, {{intel|Cascade Lake X|X|l=core}}, {{intel|Cascade Lake W|W|l=core}}
 +
|-
 +
| {{intel|Skylake (Server)|l=arch}} || {{intel|Skylake SP|SP|l=core}}, {{intel|Skylake X|X|l=core}}, {{intel|Skylake DE|DE|l=core}}, {{intel|Skylake W|W|l=core}}
 +
|-
 +
| rowspan="2" |  {{intel|Broadwell (Server)|l=arch}} || {{intel|Broadwell E|E|l=core}}, {{intel|Broadwell EP|EP|l=core}}, {{intel|Broadwell EX|EX|l=core}} || 0 || 0x6 || 0x4 || 0xF || [[Family 6 Model 79]]
 +
|-
 +
| {{intel|Broadwell DE|DE|l=core}}, {{intel|Hewitt Lake|l=core}} || 0 || 0x6 || 0x5 || 0x6 || [[Family 6 Model 86]]
 +
|-
 +
| {{intel|Haswell (Server)|l=arch}} || {{intel|Haswell E|E|l=core}}, {{intel|Haswell EP|EP|l=core}}, {{intel|Haswell EX|EX|l=core}} || 0 || 0x6 || 0x3 || 0xF || [[Family 6 Model 63]]
 +
|-
 +
| {{intel|Ivy Bridge (Server)|l=arch}} || {{intel|Ivy Bridge E|E|l=core}}, {{intel|Ivy Bridge EN|EN|l=core}}, {{intel|Ivy Bridge EP|EP|l=core}}, {{intel|Ivy Bridge EX|EX|l=core}} || 0 || 0x6 || 0x3 || 0xE || [[Family 6 Model 62]]
 +
|-
 +
| {{intel|Sandy Bridge (Server)|l=arch}} || {{intel|Sandy Bridge E|E|l=core}}, {{intel|Sandy Bridge EN|EN|l=core}}, {{intel|Sandy Bridge EP|EP|l=core}} || 0 || 0x6 || 0x2 || 0xD || [[Family 6 Model 45]]
 +
|-
 +
| rowspan="2" | {{intel|Westmere (Server)|l=arch}} || {{intel|Gulftown|l=core}}, {{intel|Westmere EP|EP|l=core}} || 0 || 0x6 || 0x2 || 0xC || [[Family 6 Model 44]]
 +
|-
 +
| {{intel|Westmere EX|EX|l=core}} || 0 || 0x6 || 0x2 || 0xF || [[Family 6 Model 47]]
 +
|-
 +
| rowspan="3" | {{intel|Nehalem (Server)|l=arch}} || {{intel|Nehalem EX|EX|l=core}} || 0 || 0x6 || 0x2 || 0xE || [[Family 6 Model 46]]
 +
|-
 +
| {{intel|Lynnfield|l=core}} || 0 || 0x6 || 0x1 || 0xE || [[Family 6 Model 30]]
 +
|-
 +
| {{intel|Bloomfield|l=core}}, {{intel|Nehalem EP|EP|l=core}}, {{intel|Nehalem WS|WS|l=core}} || 0 || 0x6 || 0x1 || 0xA || [[Family 6 Model 26]]
 +
|-
 +
| rowspan="2" | {{intel|Penryn (Server)|l=arch}} || {{intel|Dunnington|l=core}} || 0 || 0x6 || 0x1 || 0xD || [[Family 6 Model 29]]
 +
|-
 +
| {{intel|Harpertown|l=core}}, {{intel|Penryn QC|QC|l=core}}, {{intel|Wolfdale|l=core}}, {{intel|Yorkfield|l=core}} || 0 || 0x6 || 0x1 || 0x7 || [[Family 6 Model 23]]
 +
|-
 +
| {{intel|P6|l=arch}} ||  || 0 || 0x6 || 0x0 || 0xA || [[Family 6 Model 10]]
 +
|}
 +
 
 +
==== [[Small Cores]] ====
 +
Intel's client small cores refers to Intel low-power SoCs that ship in low power laptops, tablets, embedded devices, and low-power servers.
 +
 
 +
 
 +
{| class="wikitable"
 +
! Microarchitecture !! Core !! Extended Family !! Family !! Extended Model !! Model
 +
|-
 +
| rowspan="3" | {{intel|Tremont|l=arch}} || {{intel|Jasper Lake|l=core}} || 0 || 0x6 || 0x9 || 0xC || [[Family 6 Model 156]]
 +
|-
 +
| {{intel|Elkhart Lake|l=core}} || 0 || 0x6 || 0x9 || 0x6 || [[Family 6 Model 150]]
 +
|-
 +
| {{intel|Lakefield|l=core}} || 0 || 0x6 || 0x8 || 0xA || [[Family 6 Model 138]]
 
|-
 
|-
 
| {{intel|Goldmont Plus|l=arch}} || {{intel|Gemini Lake|l=core}} || 0 || 0x6 || 0x7 || 0xA || [[Family 6 Model 122]]
 
| {{intel|Goldmont Plus|l=arch}} || {{intel|Gemini Lake|l=core}} || 0 || 0x6 || 0x7 || 0xA || [[Family 6 Model 122]]
Line 74: Line 200:
 
| rowspan="2" | {{intel|Goldmont|l=arch}} || {{intel|Denverton|l=core}} || 0 || 0x6 || 0x5 || 0xF || [[Family 6 Model 95]]
 
| rowspan="2" | {{intel|Goldmont|l=arch}} || {{intel|Denverton|l=core}} || 0 || 0x6 || 0x5 || 0xF || [[Family 6 Model 95]]
 
|-
 
|-
−
| {{intel|Apollo Lake|l=core}} || 0 || 0x6 || 0x5 || 0xC || [[Family 6 Model 92]]
+
| {{intel|Apollo Lake|l=core}}, <s>{{intel|Broxton|l=core}}</s> || 0 || 0x6 || 0x5 || 0xC || [[Family 6 Model 92]]
 
|-
 
|-
 
| {{intel|Airmont|l=arch}} || {{intel|Cherry Trail|l=core}}, {{intel|Braswell|l=core}} || 0 || 0x6 || 0x4 || 0xC || [[Family 6 Model 76]]
 
| {{intel|Airmont|l=arch}} || {{intel|Cherry Trail|l=core}}, {{intel|Braswell|l=core}} || 0 || 0x6 || 0x4 || 0xC || [[Family 6 Model 76]]
Line 88: Line 214:
 
| {{intel|Bay Trail|l=core}} || 0 || 0x6 || 0x3 || 0x7 || [[Family 6 Model 55]]
 
| {{intel|Bay Trail|l=core}} || 0 || 0x6 || 0x3 || 0x7 || [[Family 6 Model 55]]
 
|-
 
|-
−
| {{intel|Saltwell|l=arch}}
+
| rowspan="3" | {{intel|Saltwell|l=arch}} || {{intel|Cedarview|l=core}} || 0 || 0x6 || 0x3 || 0x6 || [[Family 6 Model 54]]
 +
|-
 +
| {{intel|Cloverview|l=core}} || 0 || 0x6 || 0x3 || 0x5 || [[Family 6 Model 53]]
 
|-
 
|-
−
| {{intel|Bonnell|l=arch}} || {{intel|Silverthorne|l=core}}, {{intel|Diamondville|l=core}} || 0 || 0x6 || 0x1 || 0xC || [[Family 6 Model 28]]
+
| {{intel|Penwell|l=core}} || 0 || 0x6 || 0x2 || 0x7 || [[Family 6 Model 39]]
 
|-
 
|-
−
| colspan="7" style="text-align: center;" | <small>{{intel|MIC Architecture}}</small>
+
| rowspan="2" | {{intel|Bonnell|l=arch}} || {{intel|Lincroft|l=core}} || 0 || 0x6 || 0x2 || 0x6 || [[Family 6 Model 38]]
 +
|-
 +
| {{intel|Silverthorne|l=core}}, {{intel|Diamondville|l=core}}, {{intel|Pineview|l=core}} || 0 || 0x6 || 0x1 || 0xC || [[Family 6 Model 28]]
 +
|}
 +
 
 +
==== {{intel|MIC Architecture}} ====
 +
{| class="wikitable"
 +
! Microarchitecture !! Core !! Extended Family !! Family !! Extended Model !! Model
 
|-
 
|-
 
| {{intel|Knights Mill|l=arch}} || || 0 || 0x6 || 0x8 || 0x5 || [[Family 6 Model 133]]
 
| {{intel|Knights Mill|l=arch}} || || 0 || 0x6 || 0x8 || 0x5 || [[Family 6 Model 133]]
Line 98: Line 233:
 
| {{intel|Knights Landing|l=arch}} || || 0 || 0x6 || 0x5 || 0x7 || [[Family 6 Model 87]]
 
| {{intel|Knights Landing|l=arch}} || || 0 || 0x6 || 0x5 || 0x7 || [[Family 6 Model 87]]
 
|}
 
|}
 +
 +
=== Family 5 ===
 +
{| class="wikitable"
 +
! Microarchitecture !! Core !! Extended Family !! Family !! Extended Model !! Model
 +
|-
 +
| rowspan="2" | {{intel|Lakemont|l=arch}} || rowspan="2" | {{intel|Quark}} || 0 || 0x5 || 0x0 || 0xA || [[Family 5 Model 10]]
 +
|-
 +
| 0 || 0x5 || 0x0 || 0x9 || [[Family 5 Model 9]]
 +
|-
 +
| rowspan="5" | {{intel|P5|l=arch}} || rowspan="2" | P55C (Mobile) || 0 || 0x5 || 0x0 || 0x8 || [[Family 5 Model 8]]
 +
|-
 +
| 0 || 0x5 || 0x0 || 0x7 || [[Family 5 Model 7]]
 +
|-
 +
| P55C || 0 || 0x5 || 0x0 || 0x4 || [[Family 5 Model 4]]
 +
|-
 +
| P54CS || 0 || 0x5 || 0x0 || 0x2 || [[Family 5 Model 2]]
 +
|-
 +
| P5, P54, P54CQS || 0 || 0x5 || 0x0 || 0x1 || [[Family 5 Model 1]]
 +
|}
 +
 +
=== Family 4 ===
 +
{| class="wikitable"
 +
! Microarchitecture !! Core !! Extended Family !! Family !! Extended Model !! Model
 +
|-
 +
| rowspan="8" | {{intel|80486|l=arch}} || || 0 || 0x4 || 0x0 || 0x9 || [[Family 4 Model 9]]
 +
|-
 +
| 80486DX4 || 0 || 0x4 || 0x0 || 0x8 || [[Family 4 Model 8]]
 +
|-
 +
| || 0 || 0x4 || 0x0 || 0x7 || [[Family 4 Model 7]]
 +
|-
 +
| || 0 || 0x4 || 0x0 || 0x5 || [[Family 4 Model 5]]
 +
|-
 +
| 80486SL || 0 || 0x4 || 0x0 || 0x4 || [[Family 4 Model 4]]
 +
|-
 +
| 80486DX2 || 0 || 0x4 || 0x0 || 0x3 || [[Family 4 Model 3]]
 +
|-
 +
| 80486SX || 0 || 0x4 || 0x0 || 0x2 || [[Family 4 Model 2]]
 +
|-
 +
| 80486DX || 0 || 0x4 || 0x0 || 0x1 || [[Family 4 Model 1]]
 +
|}
 +
 +
=== Family 3 ===
 +
* {{intel|80386|l=arch}}
  
 
[[category:intel]]
 
[[category:intel]]
 
[[category:x86]]
 
[[category:x86]]

Latest revision as of 06:55, 18 October 2024

x86
Instruction Set Architecture
General
Variants
Topics
CPUIDs
Modes
Extensions(all)
v · d · e

Below is a list of Intel's CPUID broken down by their respective core names and microarchitecture:

CPUIDs[edit]

Family 19[edit]

Microarchitecture Core Extended Family Family Extended Model Model
Diamond Rapids 0x4 0xF 0x0 0x1 Family 19 Model 1

Family 15[edit]

Microarchitecture Core Extended Family Family Extended Model Model
Netburst 0 0xF 0x0 0x6 Family 15 Model 6
Prescott 0 0xF 0x0 0x4 Family 15 Model 4
Prescott 0 0xF 0x0 0x3 Family 15 Model 3
Northwood 0 0xF 0x0 0x2 Family 15 Model 2
Willamette 0 0xF 0x0 0x1 Family 15 Model 1

Family 11[edit]

Microarchitecture Core Extended Family Family Extended Model Model
Knights Ferry 0 0xB 0x0 0x0 Family 11 Model 0
Knights Corner 0 0xB 0x0 0x1 Family 11 Model 1

Family 6[edit]

Big Cores (Client)[edit]

Intel's client big cores refers to Intel mainstream SoCs that ship in most tablets, laptops, and desktop devices.

Microarchitecture Core Extended Family Family Extended Model Model
Meteor Lake
Raptor Lake S 0 0x6 0xB 0x7 Family 6 Model 183
P 0 0x6 0xB 0xA Family 6 Model 186
Alder Lake S 0 0x6 0x9 0x7 Family 6 Model 151
P 0 0x6 0x9 0xA Family 6 Model 154
Rocket Lake S 0 0x6 0xA 0x7 Family 6 Model 167
Tiger Lake H 0 0x6 0x8 0xD Family 6 Model 141
U 0 0x6 0x8 0xC Family 6 Model 140
Ice Lake (Client) U 0 0x6 0x7 0xE Family 6 Model 126
Y 0 0x6 0x7 0xE Family 6 Model 126
Comet Lake S, H 0 0x6 0xA 0x5 Family 6 Model 165
U 0 0x6 0x8 0xE Family 6 Model 142
Amber Lake Y
Whiskey Lake U
Cannon Lake U 0 0x6 0x6 0x6 Family 6 Model 102
Coffee Lake S, H, E 0 0x6 0x9 0xE Family 6 Model 158
U 0 0x6 0x8 0xE Family 6 Model 142
Kaby Lake DT, H, S, X 0 0x6 0x9 0xE Family 6 Model 158
Y, U 0 0x6 0x8 0xE Family 6 Model 142
Skylake (Client) DT, H, S 0 0x6 0x5 0xE Family 6 Model 94
Y, U 0 0x6 0x4 0xE Family 6 Model 78
Broadwell (Client) C, W 0 0x6 0x4 0x7 Family 6 Model 71
U, Y, S 0 0x6 0x3 0xD Family 6 Model 61
H 0 0x6 0x4 0x7 Family 6 Model 71
Haswell (Client) GT3E 0 0x6 0x4 0x6 Family 6 Model 70
ULT 0 0x6 0x4 0x5 Family 6 Model 69
S 0 0x6 0x3 0xC Family 6 Model 60
Ivy Bridge (Client) M, H, Gladden 0 0x6 0x3 0xA Family 6 Model 58
Sandy Bridge (Client) M, H, Celeron 0 0x6 0x2 0xA Family 6 Model 42
Westmere (Client) Arrandale, Clarkdale 0 0x6 0x2 0x5 Family 6 Model 37
Nehalem (Client) Auburndale, Havendale 0 0x6 0x1 0xF Family 6 Model 31
Clarksfield 0 0x6 0x1 0xE Family 6 Model 30
Penryn (Client) Penryn, Wolfdale, Yorkfield 0 0x6 0x1 0x7 Family 6 Model 23
Core (Client) Merom L 0 0x6 0x1 0x6 Family 6 Model 22
Merom 0 0x6 0x0 0xF Family 6 Model 15
Modified Pentium M Yonah 0 0x6 0x0 0xE Family 6 Model 14
Pentium M Tolapai 0 0x6 0x1 0x5 Family 6 Model 21
Dothan 0 0x6 0x0 0xD Family 6 Model 13
Banias 0 0x6 0x0 0x9 Family 6 Model 9
P6 Tualatin 0 0x6 0x0 0xB Family 6 Model 11
Coppermine, Coppermine T 0 0x6 0x0 0x8 Family 6 Model 8
Katmai 0 0x6 0x0 0x7 Family 6 Model 7
0 0x6 0x0 0x6 Family 6 Model 6
0 0x6 0x0 0x5 Family 6 Model 5
0 0x6 0x0 0x3 Family 6 Model 3
0 0x6 0x0 0x1 Family 6 Model 1

Big Cores (Server)[edit]

Intel's server big cores refers to Intel workstation and data center SoCs that ship in most enterprise desktops, workstations, and servers.

Microarchitecture Core Extended Family Family Extended Model Model
Granite Rapids
Emerald Rapids  ? 0 0x6 0xC 0xF Family 6 Model 207
Sapphire Rapids  ? 0 0x6 0x8 0xF Family 6 Model 143
Ice Lake (Server) DE 0 0x6 0x6 0xC Family 6 Model 108
SP 0 0x6 0x6 0xA Family 6 Model 106
Cooper Lake  ? 0 0x6 0x5 0x5 Family 6 Model 85
Cascade Lake SP, X, W
Skylake (Server) SP, X, DE, W
Broadwell (Server) E, EP, EX 0 0x6 0x4 0xF Family 6 Model 79
DE, Hewitt Lake 0 0x6 0x5 0x6 Family 6 Model 86
Haswell (Server) E, EP, EX 0 0x6 0x3 0xF Family 6 Model 63
Ivy Bridge (Server) E, EN, EP, EX 0 0x6 0x3 0xE Family 6 Model 62
Sandy Bridge (Server) E, EN, EP 0 0x6 0x2 0xD Family 6 Model 45
Westmere (Server) Gulftown, EP 0 0x6 0x2 0xC Family 6 Model 44
EX 0 0x6 0x2 0xF Family 6 Model 47
Nehalem (Server) EX 0 0x6 0x2 0xE Family 6 Model 46
Lynnfield 0 0x6 0x1 0xE Family 6 Model 30
Bloomfield, EP, WS 0 0x6 0x1 0xA Family 6 Model 26
Penryn (Server) Dunnington 0 0x6 0x1 0xD Family 6 Model 29
Harpertown, QC, Wolfdale, Yorkfield 0 0x6 0x1 0x7 Family 6 Model 23
P6 0 0x6 0x0 0xA Family 6 Model 10

Small Cores[edit]

Intel's client small cores refers to Intel low-power SoCs that ship in low power laptops, tablets, embedded devices, and low-power servers.


Microarchitecture Core Extended Family Family Extended Model Model
Tremont Jasper Lake 0 0x6 0x9 0xC Family 6 Model 156
Elkhart Lake 0 0x6 0x9 0x6 Family 6 Model 150
Lakefield 0 0x6 0x8 0xA Family 6 Model 138
Goldmont Plus Gemini Lake 0 0x6 0x7 0xA Family 6 Model 122
Goldmont Denverton 0 0x6 0x5 0xF Family 6 Model 95
Apollo Lake, Broxton 0 0x6 0x5 0xC Family 6 Model 92
Airmont Cherry Trail, Braswell 0 0x6 0x4 0xC Family 6 Model 76
Silvermont SoFIA 0 0x6 0x5 0xD Family 6 Model 93
Anniedale 0 0x6 0x5 0xA Family 6 Model 90
Avoton, Rangeley 0 0x6 0x4 0xD Family 6 Model 77
Tangier 0 0x6 0x4 0xA Family 6 Model 74
Bay Trail 0 0x6 0x3 0x7 Family 6 Model 55
Saltwell Cedarview 0 0x6 0x3 0x6 Family 6 Model 54
Cloverview 0 0x6 0x3 0x5 Family 6 Model 53
Penwell 0 0x6 0x2 0x7 Family 6 Model 39
Bonnell Lincroft 0 0x6 0x2 0x6 Family 6 Model 38
Silverthorne, Diamondville, Pineview 0 0x6 0x1 0xC Family 6 Model 28

MIC Architecture[edit]

Microarchitecture Core Extended Family Family Extended Model Model
Knights Mill 0 0x6 0x8 0x5 Family 6 Model 133
Knights Landing 0 0x6 0x5 0x7 Family 6 Model 87

Family 5[edit]

Microarchitecture Core Extended Family Family Extended Model Model
Lakemont Quark 0 0x5 0x0 0xA Family 5 Model 10
0 0x5 0x0 0x9 Family 5 Model 9
P5 P55C (Mobile) 0 0x5 0x0 0x8 Family 5 Model 8
0 0x5 0x0 0x7 Family 5 Model 7
P55C 0 0x5 0x0 0x4 Family 5 Model 4
P54CS 0 0x5 0x0 0x2 Family 5 Model 2
P5, P54, P54CQS 0 0x5 0x0 0x1 Family 5 Model 1

Family 4[edit]

Microarchitecture Core Extended Family Family Extended Model Model
80486 0 0x4 0x0 0x9 Family 4 Model 9
80486DX4 0 0x4 0x0 0x8 Family 4 Model 8
0 0x4 0x0 0x7 Family 4 Model 7
0 0x4 0x0 0x5 Family 4 Model 5
80486SL 0 0x4 0x0 0x4 Family 4 Model 4
80486DX2 0 0x4 0x0 0x3 Family 4 Model 3
80486SX 0 0x4 0x0 0x2 Family 4 Model 2
80486DX 0 0x4 0x0 0x1 Family 4 Model 1

Family 3[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/cpuid&oldid=102578"