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Difference between revisions of "ampere computing/emag"
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− | '''eMAG''' is a family of {{arch|64}} [[ARM]] server microprocessors designed by [[Ampere Computing]] for the data center. | + | '''eMAG''' is a family of {{arch|64}} high-performance [[ARM]]server microprocessors designed by [[Ampere Computing]] for the data center. |
+ | |||
+ | == Overview == | ||
+ | eMAG is a family of high-performance [[ARM]] server processors designed by [[Ampere Computing]] and introduced in [[2018]]. Ampere's introduction of eMAG to the market concludes the design that started out by [[AppliedMicro]]. eMAG processors targets server workloads capable of taking advantage of a high core count with high throughput. | ||
+ | |||
+ | === Codenames === | ||
+ | {| class="wikitable" | ||
+ | |- | ||
+ | ! Introduction !! Microarchitecture !! Process !! Cores | ||
+ | |- | ||
+ | | September, [[2018]] || {{ampere|Skylark|l=arch}} || [[14 nm]] || [[16 cores|16]]-[[32 cores|32]] | ||
+ | |- | ||
+ | | September, [[2019]] || {{ampere|Quicksilver|l=arch}} || [[7 nm]] || ?-? | ||
+ | |} | ||
+ | |||
+ | == Models == | ||
+ | === 1st Gen === | ||
+ | First generation eMAG processors are based on the {{ampere|Skylark|l=arch}} microarchitecture, a design that started out by [[AppliedMicro]]. Fabricated on [[TSMC]]'s [[16 nm process|16FF+ process]], those processors feature up to 32 cores operating at up to 3.3 GHz | ||
+ | |||
+ | * '''Mem:''' 8x DDR4 channels, up to 2666 MT/s with ECC | ||
+ | * '''I/O:''' 32 PCIe Gen 3 lanes | ||
+ | * '''TDP:''' Up to 125 W | ||
+ | |||
+ | == See also == | ||
+ | * Intel {{intel|Xeon Scalable}} | ||
+ | * AMD {{amd|EPYC}} | ||
+ | * Cavium {{cavium|ThunderX2}} | ||
+ | * Qualcomm {{qualcomm|Centriq}} |
Revision as of 11:01, 18 September 2018
eMAG | |
![]() | |
eMAG 8180, front | |
Developer | Ampere Computing, AppliedMicro |
Manufacturer | TSMC |
Type | Microprocessors |
Introduction | February 5, 2018 (announced) September 8, 2018 (launch) |
ISA | ARMv8 |
µarch | Skylark, Quicksilver |
Word size | 64 bit 8 octets
16 nibbles |
Process | 16 nm 0.016 μm
1.6e-5 mm |
Technology | CMOS |
Succession | |
← | |
X-Gene 3 |
eMAG is a family of 64-bit high-performance ARMserver microprocessors designed by Ampere Computing for the data center.
Contents
Overview
eMAG is a family of high-performance ARM server processors designed by Ampere Computing and introduced in 2018. Ampere's introduction of eMAG to the market concludes the design that started out by AppliedMicro. eMAG processors targets server workloads capable of taking advantage of a high core count with high throughput.
Codenames
Introduction | Microarchitecture | Process | Cores |
---|---|---|---|
September, 2018 | Skylark | 14 nm | 16-32 |
September, 2019 | Quicksilver | 7 nm | ?-? |
Models
1st Gen
First generation eMAG processors are based on the Skylark microarchitecture, a design that started out by AppliedMicro. Fabricated on TSMC's 16FF+ process, those processors feature up to 32 cores operating at up to 3.3 GHz
- Mem: 8x DDR4 channels, up to 2666 MT/s with ECC
- I/O: 32 PCIe Gen 3 lanes
- TDP: Up to 125 W
See also
- Intel Xeon Scalable
- AMD EPYC
- Cavium ThunderX2
- Qualcomm Centriq
Facts about "eMAG - Ampere"
designer | Ampere Computing + and AppliedMicro + |
first announced | February 5, 2018 + |
first launched | September 8, 2018 + |
full page name | ampere computing/emag + |
instance of | microprocessor family + |
instruction set architecture | ARMv8 + |
main designer | Ampere Computing + |
manufacturer | TSMC + |
microarchitecture | Skylark + and Quicksilver + |
name | eMAG + |
process | 16 nm (0.016 μm, 1.6e-5 mm) + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |