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{{title|Chip Multiprocessor}}
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{{title|Chip Multiprocessor}}{{multi-core processors info}}
 
A '''chip multiprocessor''' ('''CMP''') or '''multi-core''' [[microprocessor architecture|architecture]] is a [[logic]] design architecture whereby multiple processing units (e.g., CPU cores) are integrated onto a single monolithic integrated circuit or onto multiple [[dies]] in a single [[package]].
 
A '''chip multiprocessor''' ('''CMP''') or '''multi-core''' [[microprocessor architecture|architecture]] is a [[logic]] design architecture whereby multiple processing units (e.g., CPU cores) are integrated onto a single monolithic integrated circuit or onto multiple [[dies]] in a single [[package]].
  
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=== Heterogeneous multi-core architectures ===
 
=== Heterogeneous multi-core architectures ===
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{{empty section}}
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{{empty section}}<!-- big/small cores-->
  
 
==== Single and Multi-ISA designs ====
 
==== Single and Multi-ISA designs ====
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== Multi-core chips ==
 
== Multi-core chips ==
 
{{collist
 
{{collist
−
| count = 4
+
| count = 3
 
|
 
|
 
* {{\\|2|2 (dual-core)}}
 
* {{\\|2|2 (dual-core)}}
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* {{\\|46|46 (hexatetraconta-core)}}
 
* {{\\|46|46 (hexatetraconta-core)}}
 
* {{\\|48|48 (octatetraconta-core)}}
 
* {{\\|48|48 (octatetraconta-core)}}
 +
* {{\\|56|56 (hexapentaconta-core)}}
 
* {{\\|64|64 (tetrahexaconta-core)}}
 
* {{\\|64|64 (tetrahexaconta-core)}}
 +
* {{\\|96|96 (hexanonaconta-core)}}
 
* {{\\|128|128 (octacosahecta-core)}}
 
* {{\\|128|128 (octacosahecta-core)}}
 
* {{\\|256|256 (hexapentacontadicta-core)}}
 
* {{\\|256|256 (hexapentacontadicta-core)}}
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* {{\\|1000|1000 (kilo-core)}}
 
* {{\\|1000|1000 (kilo-core)}}
 
* {{\\|1024|1024 (tetracosakilia-core)}}
 
* {{\\|1024|1024 (tetracosakilia-core)}}
 +
* {{\\|2048|2048 (octatetracontadilia-core)}}
 
}}
 
}}
  
 
=== Recent high core-core chips ===
 
=== Recent high core-core chips ===
−
The following is a select list of recent (2019) high core-count chips:
+
The following is a select list of recent (2019) high core-count commercial chips:
  
 
<table class="wikitable">
 
<table class="wikitable">
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* [[Cavium]] {{cavium|ThunderX2 CN9980}} <small>(2018)</small>
 
* [[Cavium]] {{cavium|ThunderX2 CN9980}} <small>(2018)</small>
 
* [[Ampere Computing|Ampere]] {{ampere|eMAG 8180}} <small>(2018)</small>
 
* [[Ampere Computing|Ampere]] {{ampere|eMAG 8180}} <small>(2018)</small>
 +
* [[Intel]] {{intel|Xeon Platinum 9222}} <small>(2019)</small>
 
</td></tr>
 
</td></tr>
 
<tr><th>'''[[40 cores]]'''</th><td>
 
<tr><th>'''[[40 cores]]'''</th><td>
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<tr><th>'''[[48 cores]]'''</th><td>
 
<tr><th>'''[[48 cores]]'''</th><td>
 
* [[Qualcomm]] {{qualcomm|Centriq 2460}} <small>(2017)</small>
 
* [[Qualcomm]] {{qualcomm|Centriq 2460}} <small>(2017)</small>
 +
* [[Intel]] {{intel|Xeon Platinum 9242}} <small>(2019)</small>
 +
</td></tr>
 +
<tr><th>'''[[56 cores]]'''</th><td>
 +
* [[Intel]] {{intel|Xeon Platinum 9282}} <small>(2019)</small>
 
</td></tr>
 
</td></tr>
 
<tr><th>'''[[64 cores]]'''</th><td>
 
<tr><th>'''[[64 cores]]'''</th><td>
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* [[Phytium]] {{phytium|FT-2000}} <small>(2017)</small>
 
* [[Phytium]] {{phytium|FT-2000}} <small>(2017)</small>
 
* Phytium {{phytium|FT-2000+}} <small>(2019)</small>
 
* Phytium {{phytium|FT-2000+}} <small>(2019)</small>
−
</td></tr>
+
* [[AMD]] {{amd|EPYC 7742}} <small>(2019)</small></td>
 
<tr><th>'''[[68 cores]]'''</th><td>
 
<tr><th>'''[[68 cores]]'''</th><td>
 
* [[Intel]] {{intel|Xeon Phi 7250}} <small>(2016)</small>
 
* [[Intel]] {{intel|Xeon Phi 7250}} <small>(2016)</small>
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<tr><th>'''[[72 cores]]'''</th><td>
 
<tr><th>'''[[72 cores]]'''</th><td>
 
* [[Intel]] {{intel|Xeon Phi 7290}} <small>(2016)</small>
 
* [[Intel]] {{intel|Xeon Phi 7290}} <small>(2016)</small>
 +
</td></tr>
 +
<tr><th>'''[[100 cores]]'''</th><td>
 +
* [[EZchip]] [[TILE-Mx100]] <small>(2015)</small>
 
</td></tr>
 
</td></tr>
 
<tr><th>'''[[128 cores]]'''</th><td>
 
<tr><th>'''[[128 cores]]'''</th><td>
 
* [[NUDT]] {{nudt|Matrix-2000}} <small>(2017)</small>
 
* [[NUDT]] {{nudt|Matrix-2000}} <small>(2017)</small>
 
* NUDT {{nudt|Matrix-2000+}} <small>(2019)</small>
 
* NUDT {{nudt|Matrix-2000+}} <small>(2019)</small>
 +
</td></tr>
 +
<tr><th>'''[[1024 cores]]'''</th><td>
 +
* [[PEZY]] {{pezy|PEZY-SC}} <small>(2014)</small>
 +
</td></tr>
 +
<tr><th>'''[[2048 cores]]'''</th><td>
 +
* [[PEZY]] {{pezy|PEZY-SC2}} <small>(2017)</small>
 
</td></tr>
 
</td></tr>
 
</table>
 
</table>

Latest revision as of 14:43, 10 December 2023

Multi-Core CPUs
Many-Core Microprocessor
Multi-Core Microprocessor

A chip multiprocessor (CMP) or multi-core architecture is a logic design architecture whereby multiple processing units (e.g., CPU cores) are integrated onto a single monolithic integrated circuit or onto multiple dies in a single package.

History[edit]

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Overview[edit]

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Heterogeneous multi-core architectures[edit]

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Single and Multi-ISA designs[edit]

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Manycore[edit]

Main article: Manycore Microprocessor
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Multi-core chips[edit]

Recent high core-core chips[edit]

The following is a select list of recent (2019) high core-count commercial chips:

28 cores
30 cores
32 cores
40 cores
46 cores
48 cores
56 cores
64 cores
68 cores
72 cores
100 cores
128 cores
1024 cores
2048 cores

See also[edit]


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