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KaiXian KX-U6880 - Zhaoxin
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KaiXian KX-U6880
kx-6000 (front).png
KX-U6880 front
General Info
DesignerZhaoxin
ManufacturerTSMC
Model NumberKX-U6880
Part NumberKX-U6880
MarketDesktop, Mobile, Embedded
IntroductionSeptember, 2018 (announced)
General Specs
FamilyKaiXian
SeriesKX-6000
Frequency3,000 MHz
Bus typePCIe 3.0
Bus rate4 × 8 GT/s
Clock multiplier30
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureLuJiaZui
Process16 nm
TechnologyCMOS
Word Size64 bit
Cores8
Threads8
Max CPUs1 (Uniprocessor)
Max Memory64 GiB

KaiXian KX-U6880 is a 64-bit octa-core x86 microprocessor designed by Zhaoxin and announced in late 2018 specifically for the Chinese market. This processor is fabricated on a 16 nm process based on the LuJiaZui microarchitecture. The KX-U6880 operates at 3 GHz with a TDP of ? W and supports up to 64 GiB of dual-channel DDR4-3200 memory. The KX-U6880 also incorporates an integrated graphics processor.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.


Cache[edit]

Main article: LuJiaZui § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
L1I$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
8x32 KiB8-way set associative 
L1D$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
8x32 KiB8-way set associative 

L2$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  2x4 MiB32-way set associative 

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-3200
Supports ECCNo
Max Mem64 GiB
Controllers1
Channels2
Max Bandwidth47.68 GiB/s
Bandwidth
Single 23.84 GiB/s
Double 47.68 GiB/s

Expansions[edit]

This chip has 16 PCIe 3.0 lanes, two SATA 3.0 interfaces, two USB 3.1 Gen 1, and four USB 2.0 ports.

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 16


Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPU?
DesignerZhaoxin
Max Displays3
Frequency? MHz
"? MHz" is not a number.
OutputDisplayPort, Embedded DisplayPort, HDMI, VGA

Max Resolution
HDMI4096x2304
DP4096x2304 @60 Hz
eDP4096x2304 @60 Hz

Standards
DirectX11.1
DP1.2a
eDP1.3
HDMI1.4b

Features[edit]

Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
KaiXian KX-U6880 - Zhaoxin#pcie +
base frequency3,000 MHz (3 GHz, 3,000,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typePCIe 3.0 +
clock multiplier30 +
core count8 +
designerZhaoxin +
familyKaiXian +
first announcedSeptember 2018 +
full page namezhaoxin/kaixian/kx-u6880 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supportfalse +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Trusted Execution Technology +, Intel VT-x + and Extended Page Tables +
has intel trusted execution technologytrue +
has intel vt-x technologytrue +
has second level address translation supporttrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpu? +
integrated gpu designerZhaoxin +
isax86-64 +
isa familyx86 +
l1$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l1d$ description8-way set associative +
l1d$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
l1i$ description8-way set associative +
l1i$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
l2$ description32-way set associative +
l2$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +
ldateSeptember 2018 +
main imageFile:kx-6000 (front).png +
main image captionKX-U6880 front +
manufacturerTSMC +
market segmentDesktop +, Mobile + and Embedded +
max cpu count1 +
max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory channels2 +
microarchitectureLuJiaZui +
model numberKX-U6880 +
nameKaiXian KX-U6880 +
part numberKX-U6880 +
process16 nm (0.016 μm, 1.6e-5 mm) +
seriesKX-6000 +
supported memory typeDDR4-3200 +
technologyCMOS +
thread count8 +
word size64 bit (8 octets, 16 nibbles) +