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Ryzen 5 5500U
General Info
Designer	AMD
Manufacturer	TSMC
Model Number	5500U
Part Number	100-000000375
Market	Mobile
Introduction	January 12, 2021 (announced) January 12, 2021 (launched)
Shop	Amazon
General Specs
Family	Ryzen 5
Series	5000
Frequency	2,100 MHz
Turbo Frequency	4,000 MHz
Clock multiplier	21
Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Zen 2
Core Name	Lucienne
Core Family	23
Core Model	104
Process	7 nm
Technology	CMOS
Word Size	64 bit
Cores	6
Threads	12
Max Memory	64 GiB
Multiprocessing
Max SMP	1-Way (Uniprocessor)
Electrical
TDP	15 W
cTDP down	10 W
cTDP up	25 W
Tcase	0 °C – 105 °C
Packaging
Package	BGA-1140 (FC-OBGA)
Dimension	35 mm × 25 mm × 1.38 mm
Pitch	0.65 mm
Contacts	1140

Ryzen 5 5500U is a 64-bit hexa-core mid-range performance x86 mobile microprocessor introduced by AMD in early 2021. Fabricated on a TSMC 7-nanometer process and based on AMD's Zen 2 microarchitecture, the 5500U operates at a base frequency of 2.1 GHz with a TDP of 15 W and a boost frequency of up to 4.0 GHz. This APU supports a configurable TDP-down of 10 W and TDP-up of 25 W, DDR4-3200 or LPDDR4-4266 memory, and integrates a Radeon Vega 7 GPU operating at up to 1.8 GHz.

Cache

Main article: Zen 2 § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 384 KiB 393,216 B 0.375 MiB L1I$ 192 KiB 196,608 B 0.188 MiB 6x32 KiB 8-way set associative   L1D$ 192 KiB 196,608 B 0.188 MiB 6x32 KiB 8-way set associative write-back L2$ 3 MiB 3,072 KiB 3,145,728 B 0.00293 GiB     6x512 KiB 8-way set associative write-back L3$ 8 MiB 8,192 KiB 8,388,608 B 0.00781 GiB     2x4 MiB 16-way set associative write-back

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type DDR4-3200, LPDDR4-4266

Expansions

[Edit/Modify Expansions Info]

	Expansion Options
PCIe Revision: 3.0

Graphics

[Edit/Modify IGP Info]

	Integrated Graphics Information
	GPU Radeon Vega 7 Designer AMD Execution Units 7 Burst Frequency 1,800 MHz 1.8 GHz 1,800,000 KHz Standards DirectX open gl

Features

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX MMX Extension EMMX Extended MMX Extension SSE Streaming SIMD Extensions SSE2 Streaming SIMD Extensions 2 SSE3 Streaming SIMD Extensions 3 SSSE3 Supplemental SSE3 SSE4.1 Streaming SIMD Extensions 4.1 SSE4.2 Streaming SIMD Extensions 4.2 SSE4a Streaming SIMD Extensions 4a AVX Advanced Vector Extensions AVX2 Advanced Vector Extensions 2 ABM Advanced Bit Manipulation BMI1 Bit Manipulation Instruction Set 1 BMI2 Bit Manipulation Instruction Set 2 FMA3 3-Operand Fused-Multiply-Add AES AES Encryption Instructions RdRand Hardware RNG SHA SHA Extensions ADX Multi-Precision Add-Carry CLMUL Carry-less Multiplication Extension F16C 16-bit Floating Point Conversion x86-16 16-bit x86 x86-32 32-bit x86 x86-64 64-bit x86 Real Real Mode Protected Protected Mode SMM System Management Mode FPU Integrated x87 FPU NX No-eXecute SMT Simultaneous Multithreading AMD-Vi AMD-Vi (I/O MMU virtualization) AMD-V AMD Virtualization SenseMI SenseMI Technology

References

• "AMD Announces World’s Best Mobile Processors In CES 2021 Keynote" (Press release). AMD.com. January 12, 2021. Retrieved May 2021.
• "AMD Ryzen™ 5 5500U". AMD.com. Retrieved May 2021.