• intel/mcs-80
  | caption = {{\|8080}}, the CPU of the MCS-80 system ...y [[Intel]]. Introduced on April, 1974, the MCS-80 featured the {{\|8080}} CPU, the forefather of all modern [[x86]]-based microprocessors.
  4 KB (406 words) - 16:10, 26 January 2019
• 32 nm lithography process
  | process 1 name = P1268 (CPU) / P1269 (SoC)
  10 KB (1,090 words) - 19:14, 8 July 2021
• 14 nm lithography process
  | process 1 name = P1272 (CPU) / P1273 (SoC) ...or performance and high frequency (e.g., high-switching circuitry in the [[CPU]]) whereas short cells are optimized for density (e.g., GPU shader arrays).
  17 KB (2,243 words) - 19:32, 25 May 2023
• 45 nm lithography process
  | colspan="2" | P1266 (CPU) / P1266.8 (SoC) / P1269 (SoC) || colspan="2" | CS-300 || colspan="2" | ||
  5 KB (602 words) - 05:51, 20 July 2018
• intel/microarchitectures/bonnell
  |atype=CPU ...tel turned to higher integration, moving [[integrated graphics|Graphics]], CPU core, Video Acceleration, [[Display Controller]], and [[Memory Controller]]
  38 KB (5,468 words) - 20:29, 23 May 2019
• intel/microarchitectures/saltwell
  | atype = CPU <tr><th colspan="8">CPU</th><th colspan="3">IGP</th></tr>
  7 KB (872 words) - 19:42, 30 November 2017
• intel/microarchitectures/silvermont
  | atype = CPU
  9 KB (1,160 words) - 09:35, 25 September 2019
• intel/microarchitectures/airmont
  | atype = CPU
  5 KB (568 words) - 19:40, 30 November 2017
• intel/microarchitectures/goldmont
  |atype=CPU
  7 KB (956 words) - 23:05, 23 March 2020
• intel/pentium (2009)
  <tr><th colspan="8">CPU</th><th colspan="3">IGP</th></tr> ...ated the [[integrated graphics]] on this same die as the newly architected CPU, allowing for higher performance and lower power than previous generation.
  20 KB (2,661 words) - 00:45, 11 October 2017
• intel/celeron
  <tr><th colspan="8">CPU</th><th colspan="3">IGP</th></tr>
  25 KB (3,201 words) - 03:13, 22 September 2018
• intel/xeon d
  All models are a single-chip solution, meaning both the [[CPU]] [[die]] and the [[chipset]] die are packaged together on the same substra All models are a single-chip solution, meaning both the [[CPU]] [[die]] and the [[chipset]] die are packaged together on the same substra
  13 KB (1,784 words) - 08:04, 6 April 2019
• intel/microarchitectures/broadwell (client)
  |atype=CPU ...l]] [[instance of::microprocessor]] [[microarchitecture::Broadwell]] [[max cpu count::1]]
  14 KB (1,891 words) - 14:37, 6 January 2022
• intel/microarchitectures/haswell (client)
  |atype=CPU ==== CPU changes ====
  27 KB (3,750 words) - 06:57, 18 November 2023
• intel/microarchitectures/ivy bridge (client)
  | atype = CPU * 4 CPU cores
  5 KB (689 words) - 13:44, 2 May 2020
• intel/microarchitectures/sandy bridge (client)
  |atype=CPU ...diagram from Intel. The master design incorporates the [[quad-core|four]] CPU [[physical cores|cores]], the [[GPU]] with 12 execution units, the 8 MiB sh
  84 KB (13,075 words) - 00:54, 29 December 2020
• intel/microarchitectures/westmere (client)
  | atype = CPU ...l]] [[instance of::microprocessor]] [[microarchitecture::Westmere ]] [[max cpu count::1]]
  10 KB (1,258 words) - 21:07, 9 March 2018
• intel/microarchitectures/nehalem (client)
  | atype = CPU
  4 KB (459 words) - 21:44, 26 December 2023
• intel/microarchitectures/p6
  | atype = CPU
  3 KB (325 words) - 21:34, 22 February 2020
• intel/microarchitectures/skylake (client)
  |atype=CPU **** Limits motherboard trace design to 7 inches max from the CPU to chipset (down from 8)
  79 KB (11,922 words) - 06:46, 11 November 2022
• intel/microarchitectures/kaby lake
  |atype=CPU ...her via Intel's standard [[DMI 3.0]] bus interface which utilizes 4 of the CPU's 20 [[PCIe]] 3.0 lanes (having a transfer rate of 8 GT/s per lane). Only {
  38 KB (5,431 words) - 10:41, 8 April 2024
• intel/microarchitectures/cannon lake
  |atype=CPU * 2 CPU cores + 40 GPU EUs
  7 KB (887 words) - 12:53, 5 August 2019
• intel/microarchitectures/ice lake (client)
  |atype=CPU ...in-and-light market. The microprocessor consists of five major components: CPU cores, LLC, {{intel|ring interconnect}}, {{intel|system agent}}, and {{\\|G
  23 KB (3,613 words) - 12:31, 20 June 2021
• intel/microarchitectures/tiger lake
  |atype=CPU
  3 KB (406 words) - 10:46, 19 July 2023
• intel/core i7ee/i7-6950x
  {{see also|intel/frequency_behavior|l1=Intel's CPU Frequency Behavior}}
  4 KB (564 words) - 14:29, 24 March 2019
• 10 nm lithography process
  | process 1 name = P1274 (CPU) / P1275 (SoC) ** CPU
  14 KB (1,903 words) - 06:52, 17 February 2023
• nvidia
  == CPU Families == '''CPU:'''
  3 KB (261 words) - 16:48, 20 March 2024
• intel/80486/486dx-33
  File:Intel i486 DX33 CPU SX 419.jpg|A80486DX-33, S-Spec SX419
  3 KB (321 words) - 02:59, 18 December 2017
• intel/80486/486dx-50
  | image = CPU Intel 80486DX-50.JPG File:Intel i486 DX 50 CPU.jpg|A80486DX-50, S-Spec SX710
  3 KB (265 words) - 16:13, 13 December 2017
• intel/80486/486dx2-50
  | image = Ic-photo-Intel--SB80486DX2-50--(486-CPU).JPG
  3 KB (345 words) - 16:13, 13 December 2017
• intel/80486/486dx2-66
  File:Intel i486 DX2 66 CPU SX750.jpg|A80486DX2-66, S-Spec SX750 File:Intel i486 DX2 66 CPU SX955.jpg|A80486DX2-66, S-Spec SX955
  4 KB (372 words) - 06:28, 15 February 2024
• intel/80486/486dx4-75
  | image = Ic-photo-Intel--FC80486DX4-75--(486-CPU).png
  3 KB (354 words) - 16:13, 13 December 2017
• intel/80486/486dx4-100
  Ic-photo-Intel--A80486DX4100-(486DX4-CPU).png|A80486DX4100, S-Spec SK096
  4 KB (414 words) - 16:13, 13 December 2017
• intel/80486/486sx-33
  File:Ic-photo-Intel--SB80486SX-33--(486-CPU).JPG|SB80486SX-33
  4 KB (345 words) - 16:14, 13 December 2017
• amd/am486/am486dx-40
  | image = Ic-photo-AMD--Am486DX-40-(A80486DX-40)-(486-CPU).jpg File:AMD Am486 DX 40 CPU E.jpg
  3 KB (270 words) - 15:18, 13 December 2017
• amd/am486/am486dx2-80
  This is the fastest regular 486-type CPU that has also been available as a native 5 Volt part.
  1 KB (209 words) - 21:53, 7 February 2024
• amd/am486/am486dx2-66
  File:AMD Am486 DX2 66 CPU E6.jpg| File:AMD Am486 DX2 66 CPU D.jpg
  3 KB (286 words) - 15:18, 13 December 2017
• amd/am486/am486dx4-100nv8t
  | image = Ic-photo-AMD--A80486DX4-100NV8T-(486-CPU).png File:AMD Am486 DX4 100 NV8T CPU.jpg|
  3 KB (348 words) - 15:19, 13 December 2017
• amd/am5x86
  * [[:File:CPU Thermal Management (Am486, Am5x86, K5) (August 1995).pdf|CPU Thermal Management]]; Publication #18448 Revision D/0; August 1995.
  7 KB (1,043 words) - 16:50, 14 June 2020
• amd/am5x86/am486dx5-133w16bgc
  | image = Ic-photo-AMD--Am5x86-P75-(Am486DX5-133W16BGC)-(486-CPU).jpg File:Ic-photo-AMD--Am5x86-P75-(Am486DX5-133W16BGC)-(486-CPU).jpg|1997, Week 46
  3 KB (358 words) - 15:19, 13 December 2017
• amd/am5x86/am486dx5-133v16bhc
  File:Ic-photo-AMD--AM486DX5-133V16BHC--(Am5x86-P75)--(486-CPU).JPG
  3 KB (342 words) - 15:19, 13 December 2017
• amd/am5x86/amd-x5-133adw
  File:Ic-photo-AMD--AMD-X5-133ADW-(Am5x86-P75)-(586-CPU).png|From 1996 Week 10
  3 KB (336 words) - 15:19, 13 December 2017
• amd/am286/n80l286-16
  | image = Ic-photo-AMD--N80L286-16 S-(286-CPU).png
  3 KB (281 words) - 15:18, 13 December 2017
• amd/am286/r80286-10
  | image = Ic-photo-AMD--R80286-10 S-(286-CPU).png
  3 KB (296 words) - 15:18, 13 December 2017
• amd/am286zx-lx/ng286lx-12
  * CPU shutdown mode; System shutdown mode
  3 KB (339 words) - 15:18, 13 December 2017
• amd/am286zx-lx/ng286lx-16
  * CPU shutdown mode; System shutdown mode
  3 KB (339 words) - 15:18, 13 December 2017
• amd/am186/n80c186
  | image = Ic-photo-AMD--N80C186-(186-CPU).png
  3 KB (280 words) - 04:32, 22 October 2019
• amd/am186/n80c186-16
  | image = Ic-photo-AMD--N80C186-16-(186-CPU).png
  3 KB (286 words) - 15:17, 13 December 2017
• amd/am186/r80186-6
  | image = Ic-photo-AMD--R80186-6 B4-(186-CPU).png
  3 KB (250 words) - 15:17, 13 December 2017
• intel/xeon e7
  |?max cpu count
  4 KB (482 words) - 05:08, 18 February 2020

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