...ments of a computer system on a single [[integrated circuit]], or as a few integrated circuits operating as a cohesive unit, designed for the processing digital While the basic functionality is shared among all microprocessors, they vary greatly in the type and size of data they handle

...40 nm lithography process|40 nm process]] stopgap. Commercial [[integrated circuit]] manufacturing using 32 nm process began in 2010. This technology was supe == Find models ==

...use of the underlying technology. The composition of the actual integrated circuit also varies by manufacturer and by design due to different goals. For examp ...Double Patterning]] (SADP) at the critical patterning layers. Compared to all other "14 nm nodes", Intel's process is the densest and considerably so, wi

*** All in one array ...t any software is now 100% compatible but it forced engineers to deal with all the baggage the architecture brought along. The decision to offer full comp

...chnology, as opposed to gate length or half pitch. Commercial [[integrated circuit]] manufacturing using 22 nm process began in 2008 for memory and 2012 for [ == Find models ==

...also delayed after expensive and lengthy litigation with Intel. The first models of the Am486 (Am486DX) were finally introduced in April of 1993. The first AMD's last models (Am486DX4's) for this family were clocked at up to 120 MHz which gave AMD a

* '''Note:''' While a model has an unlocked multiplier, not all chipsets support overclocking. (see [[#Sockets/Platform|§Sockets]]) ...ripper}} line) when sufficient thermo/electric requirements are met. Non-X models are limited to just +50 MHz.

A '''quad-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements four independent physical execution units (referred to as == Quad-core models ==

A '''hexa-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements six independent physical execution units (referred to as == Hexa-core models ==

An '''octa-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements eight independent physical execution units (referred to a == Octa-core models ==

A '''deca-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements ten independent physical execution units (referred to as == Deca-core models ==

A '''dodeca-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements twelve independent physical execution units (referred to == Dodeca-core models ==

A '''tetradeca-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements fourteen independent physical execution units (referred t == Tetradeca-core models ==

A '''hexadeca-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements sixteen independent physical execution units (referred to == Hexadeca-core models ==

An '''octadeca-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements eighteen independent physical execution units (referred t == Octadeca-core models ==

A '''icosa-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements twenty independent physical execution units (referred to == Icosa-core models ==

A '''docosa-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements twenty-two independent physical execution units (referred == Docosa-core models ==

A '''penta-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements five independent physical execution units (referred to as == Penta-core models ==

A '''nona-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements nine independent physical execution units (referred to as == Nona-core models ==

A '''hepta-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements seven independent physical execution units (referred to a == Hepta-core models ==

A '''undeca-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements eleven independent physical execution units (referred to == Undeca-core models ==

A '''trideca-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements thirteen independent physical execution units (referred t == Trideca-core models ==

A '''pentadeca-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements fifteen independent physical execution units (referred to == Pentadeca-core models ==

A '''heptadeca-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements seventeen independent physical execution units (referred == Heptadeca-core models ==

A '''nonadeca-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements nineteen independent physical execution units (referred t == Nonadeca-core models ==

A '''henicosa-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements twenty-one independent physical execution units (referred == Henicosa-core models ==

A '''tricosa-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements twenty-three independent physical execution units (referr == Tricosa-core models ==

A '''tetracosa-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements twenty-four independent physical execution units (referre == Tetracosa-core models ==

A '''hexacosa-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements twenty-six independent physical execution units (referred == Hexacosa-core models ==

A '''pentacosa-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements twenty-five independent physical execution units (referre == Pentacosa-core models ==

A '''heptacosa-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements twenty-seven independent physical execution units (referr == Heptacosa-core models ==

A '''octacosa-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements twenty-eight independent physical execution units (referr == Octacosa-core models ==

A '''nonacosa-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements twenty-nine independent physical execution units (referre == Nonacosa-core models ==

A '''triaconta-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements thirty independent physical execution units (referred to == Triaconta-core models ==

...me="AMD-57095-0.71">{{cite techdoc|title=Revision Guide for AMD Family 19h Models 10h–1Fh Processors|publ=AMD|pid=57095|rev=0.71|date=2021-07}}</ref> ...AMD-56683-1.04-NDA">{{cite techdoc|title=Revision Guide for AMD Family 19h Models 00h-0Fh Processors|publ=AMD|pid=56683|rev=1.04|date=2021-06}}</ref>

A '''dotriaconta-core''' [[microprocessor]] refers to an [[integrated circuit]] that implements thirty-two independent physical execution units (referred == Dotriaconta-core models ==

| {{amd|CPUID#Family 23 (17h)|Family 17h}} Models 60h–6Fh | {{amd|CPUID#Family 25 (19h)|Family 19h}} Models 50h–5Fh

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