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SHAVE v3.0 µarch
General Info
Arch Type	Accelerator
Designer	Movidius
Manufacturer	TSMC
Introduction	2014
Process	28 nm
Pipeline
Type	VLLIW
Instructions
ISA	SHAVE, SPARC v8
Cache
L2 Cache	256 KiB/chip 2-way set associative
Side Cache	128-256 MiB SDRAM/chip
Succession
SHAVE v2.0

Fragrak or Streaming Hybrid Architecture Vector Engine v3.0 (SHAVE v3.0) is an accelerator microarchitecture designed by Movidius for their vision processors, serving as a successor to the SHAVE v2.0. SHAVE-based products are branded as the Myriad 2 family of vision processors.

History

The SHAVE v3.0 microarchitecture is based on the SHAVE v2.0 microarchitecture which Movidius disclosed in 2011. The architecture is a word of a 70-staff team consisting of 65 engineers - 10% working on hardware while the remaining 90% were working on the system tools and software design.

Process Technology

Main article: 28 nm lithography process

This microarchitecture was designed for TSMC's 28 nm process.

Architecture

Key changes from SHAVE v2.0

• 28 nm process (from 65 nm)
• 20-30x performance
  • 600 MHz (3.33x, from 180 MHz)
  • 12 SHAVE cores (from 8)
  • 5x per-core performance improvement
• Aggregate nominal 600 Mpixel/sec throughput
• LEON4 SPARC core (from LEON3)
• Added support for OpenCL

Overview

Core

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Package

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Die

• TSMC's 28HPM process
• 27 mm² die size