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KaiXian KX-5540 - Zhaoxin
Edit Values | |
KaiXian KX-5540 | |
KX-5540 front | |
General Info | |
Designer | Zhaoxin |
Manufacturer | HLMC |
Model Number | KX-5540 |
Part Number | KX-5540 |
Market | Desktop, Mobile, Embedded |
Introduction | December 28, 2017 (announced) December 28, 2017 (launched) |
General Specs | |
Family | KaiXian |
Series | KX-5000 |
Frequency | 1,800 MHz |
Bus type | PCIe 3.0 |
Bus rate | 4 × 8 GT/s |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | WuDaoKou |
Process | 28 nm |
Transistors | 2,100,000,000 |
Technology | CMOS |
Die | 187 mm² |
Word Size | 64 bit |
Cores | 4 |
Threads | 4 |
Max Memory | 64 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
Tjunction | 0 °C – 90 °C |
KaiXian KX-5540 is a 64-bit quad-core x86 microprocessor designed by Zhaoxin and introduced in late 2017 specifically for the Chinese market. This processor is fabricated on a 28 nm process based on the WuDaoKou microarchitecture. The KX-5640 operates at 1.8 GHz with a TDP of ? W and supports up to 64 GiB of dual-channel DDR4-2133 memory. The KX-5540 also incorporates an integrated graphics processor.
Cache
- Main article: WuDaoKou § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
Integrated Memory Controller
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Expansions
Expansion Options |
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Graphics
Integrated Graphics Information
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Features
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Facts about "KaiXian KX-5540 - Zhaoxin"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | KaiXian KX-5540 - Zhaoxin#pcie + |
base frequency | 1,800 MHz (1.8 GHz, 1,800,000 kHz) + |
bus links | 4 + |
bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
bus type | PCIe 3.0 + |
core count | 4 + |
designer | Zhaoxin + |
die area | 187 mm² (0.29 in², 1.87 cm², 187,000,000 µm²) + |
family | KaiXian + |
first announced | December 28, 2017 + |
first launched | December 28, 2017 + |
full page name | zhaoxin/kaixian/kx-5540 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | false + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Trusted Execution Technology +, Intel VT-x + and Extended Page Tables + |
has intel trusted execution technology | true + |
has intel vt-x technology | true + |
has second level address translation support | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
integrated gpu | ? + |
integrated gpu designer | Zhaoxin + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 32-way set associative + |
l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
ldate | December 28, 2017 + |
main image | + |
main image caption | KX-5540 front + |
manufacturer | HLMC + |
market segment | Desktop +, Mobile + and Embedded + |
max cpu count | 1 + |
max junction temperature | 363.15 K (90 °C, 194 °F, 653.67 °R) + |
max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) + |
max memory bandwidth | 31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
max memory channels | 2 + |
microarchitecture | WuDaoKou + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | KX-5540 + |
name | KaiXian KX-5540 + |
part number | KX-5540 + |
process | 28 nm (0.028 μm, 2.8e-5 mm) + |
series | KX-5000 + |
smp max ways | 1 + |
supported memory type | DDR4-2133 + |
technology | CMOS + |
thread count | 4 + |
transistor count | 2,100,000,000 + |
word size | 64 bit (8 octets, 16 nibbles) + |