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From WikiChip
Icelake - Microarchitectures - Intel
< intel | microarchitectures
Revision as of 03:35, 15 July 2017 by 60.49.33.29 (talk)
| Edit Values | |
| Icelake µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | 2018 |
| Process | 10 nm |
| Succession | |
Icelake (ICL) is a planned microarchitecture by Intel as a successor to Cannonlake. Icelake is expected to be fabricated using a 10 nm process. Icelake is the "Architecture" microarchitecture as part of Intel's PAO model.
Process Technology
- Main article: Cannonlake § Process Technology
Icelake is set to use the same 10 nm process that was designed for Cannonlake.
Architecture
Not much is known about Ice Lake's architecture.
Key changes from Cannonlake
 |
Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release. |
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/ice_lake_(client)&oldid=54819"
Facts about "Ice Lake (client) - Microarchitectures - Intel"
| codename | Icelake + |
| designer | Intel + |
| first launched | 2018 + |
| full page name | intel/microarchitectures/ice lake (client) + |
| instance of | microarchitecture + |
| manufacturer | Intel + |
| microarchitecture type | CPU + |
| name | Icelake + |
| process | 10 nm (0.01 μm, 1.0e-5 mm) + |