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K6-III - AMD
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AMD K6-III
k6-iii logo.svg
K6-III marking logo
Developer AMD
Manufacturer AMD
Type Microprocessors
Introduction October 16, 1998 (announced)
February 22, 1999 (launch)
Architecture IA-32 with MMX and 3DNow+
ISA IA-32
µarch K6-III
Word size 32
32 bit
4 octets
8 nibbles
Process 180 nm
0.18 μm
1.8e-4 mm
, 250 nm
0.25 μm
2.5e-4 mm
Technology CMOS
Clock 333 MHz-450 MHz
Package CPGA-321
Socket Socket 7, Super Socket 7
Succession
K6-2 Athlon

K6-III was a family of 32-bit x86 microprocessors introduced by AMD in February of 1999 as a successor to the K6-2 family. K6-III was an attempt by AMD to stretch the life of the original K6 (a NexGen design) for a bit longer while they worked on K7 (Athlon).

Overview

AMD's K7 was well into development in 1998 when they announced a partnership with Motorola (now Freescale). Athlon was to be released in mid-1999. The K6-III served as a temporary solution, introducing a number of small modification to the microarchitecture which resulted in a performance increase. The significant increase in performance is a result of a new large on-die L2$. Previously, systems incorporated an L2$ on the motherboard which ranged from 512 KB to 2MB. This changed with K6-III which added 256 KB of level 2 cache on-die. AMD branded this setup "TriLevel Cache", moving the on-motherboard cache to level 3. By June of 1999, AMD moved on to Athlon.

As with K6-2, K6-III offers 3DNow!, MMX, and 3DNow+ which contained a number of new DSP instructions. K6-III, however, did not incorporated any new Intel MMX instructions.

Architecture

Main article: K6-III Microarchitecture
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Die Shot

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Members

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Facts about "K6-III - AMD"
designerAMD +
first announcedOctober 16, 1998 +
first launchedFebruary 22, 1999 +
full page nameamd/k6-iii +
instance ofmicroprocessor family +
instruction set architectureIA-32 +
main designerAMD +
manufacturerAMD +
microarchitectureK6-III +
nameAMD K6-III +
packageCPGA-321 +
process180 nm (0.18 μm, 1.8e-4 mm) + and 250 nm (0.25 μm, 2.5e-4 mm) +
socketSocket 7 + and Super Socket 7 +
technologyCMOS +
word size32 bit (4 octets, 8 nibbles) +