HiSilicon

Family

• Hi16xx
• Hi3xxx
• K3
• Kirin
• Ascend
• Balong
• Kunpeng
• TaiShan (uarch)

Kirin

TaiShan (uarch)

Kirin 9000E, 9000L, 9000 5G/4G series

Kirin 9000 is HiSilicon's first SoC based on 5 nm+ FinFET (EUV) TSMC technology (N5 node)

and the first 5 nm SoC to be launched on the international market.

This octa-core system on a chip is based on the 9th Gen of the HiSilicon Kirin series

and is equipped with 15.3 billion transistors in a 1+3+4 core configuration:

• 4x ARM Cortex-A77 CPU (1x 3.13 GHz and 3x 2.54 GHz),
• 4x ARM Cortex-A55 (4x 2.05 GHz) and
• 24-core Mali-G78 GPU (22-core in the Kirin 9000E version)

The Kirin 9000L uses a 1+2+3 core configuration:

• 3x ARM Cortex-A77 (1x 3.13 GHz and 2x 2.54 GHz),
• 3x ARM Cortex-A55 (3x 2.05 GHz) and
• 22-core Mali-G78 GPU with Kirin Gaming + 3.0 implementation

Spec

• GPU
  • Kirin 9000L: ARM Mali-G78 MP22
  • Kirin 9000E: ARM Mali-G78 MP22
  • Kirin 9000: ARM Mali-G78 MP24
• Da Vinci NPU architecture 2.0
  • Kirin 9000L: 1x Big Core + 1x Tiny Core
  • Kirin 9000E: 1x Big Core + 1x Tiny Core
  • Kirin 9000: 2x Big Cores + 1x Tiny Core

Model number	Fab node	CPU				GPU		Memory technology			Sampling availability
		ISA	µarch	Cores	Freq (GHz)	µarch	Freq (MHz)	Type	Bus width (bit)	Band width (GB/s)
Kirin 9000L	TSMC 5 nm+ FinFET (EUV)	ARM v8.2-A	Cortex-A77 Cortex-A55 (big.LITTLE)	(1+2)+3	3.13 (A77 H) 2.54 (A77 L) 2.05 (A55)	Mali-G78 MP22	759 MHz (1068.7 GFLOPS in FP32)	LPDDR4X -2133 LPDDR5 -2750	64-bit (4x16-bit) Quad-channel	LPDDR4X (34.1 GB/s) LPDDR5 (44.0 GB/s)	Q4 2020
Kirin 9000E				(1+3)+4
Kirin 9000 (Hi36A0V101) Kirin 9000 4G Kirin 9000 5G						Mali-G78 MP24	759 MHz (1165.8 GFLOPS in FP32)

Kirin 9000S, 9010, 9020 series

The Kirin 9000S, Kirin 9000S1, and Kirin 9010 of the Kirin 9000 (Hi36A0) family are the first HiSilicon-developed SoCs manufactured

in high volumes in mainland China by Semiconductor Manufacturing International Corporation (SMIC).

The SoCs are based on SMIC's 7 nm technology node, referred to as "N+2".

It also includes 1x Da Vinci "big" NPU core and 1x Da Vinci "small" NPU core.

Model number	Fab node	CPU				GPU		Memory technology			Sampling availability
		ISA	µarch	Cores (total) Threads (total)	Freq (GHz)	µarch	Freq (MHz)	Type	Bus width (bit)	Band width (GB/s)
Kirin 9000S (Hi36A0V120)	SMIC N+2 7 nm FinFET	ARMv8.x	HiSilicon TaiShan, Cortex-A510	1+3+4 (8) 2+6+4 (12)	2.62 GHz (TaishanV120) 2.15 GHz (TaishanV120) 1.53 GHz (Cortex-A510)	HiSilicon Maleoon 910	750 MHz	LPDDR5 -6400 LPDDR5X -8533	64-bit (4x16-bit) Quad- channel	LPDDR5 (51.2 MB/s) LPDDR5X (68.2 MB/s)	Q3 2023
Kirin 9000S1 (Hi36A0V120)					2.49 GHz (TaishanV120) 2.15 GHz (TaishanV120) 1.53 GHz (Cortex-A510)						Q1 2024
Kirin 9000W (Hi36A0V120)											Q4 2023
Kirin 9000WL (Hi36A0V120)											Q2 2024
Kirin 9000WE (Hi36A0V120)											Q2 2024
Kirin T90 (Hi36A0V120)											Q3 2024
Kirin T90A (Hi36A0V120)											Q3 2024
Kirin 9000SL (Hi36A0V120)				1+2+3 (6) 2+4+3 (9)	2.35 GHz (TaishanV120) 2.15 GHz (TaishanV120) 1.53 GHz (Cortex-A510)						Q4 2023
Kirin 9000WM (Hi36A0V120)											Q2 2024
Kirin 9010 (Hi36A0V121)				1+3+4 (8) 2+6+4 (12)	2.30 GHz (TaishanV121) 2.18 GHz (TaishanV120) 1.55 GHz (Cortex-A510)						Q2 2024
Kirin 9010E (Hi36A0V121)					2.19 GHz (TaishanV121) 2.18 GHz (TaishanV120) 1.55 GHz (Cortex-A510)						Q3 2024
Kirin 9010A (Hi36A0V121)											Q3 2024
Kirin 9010W (Hi36A0V121)											Q3 2024
Kirin T91 (Hi36A0V121)											Q3 2024
Kirin 9010L (Hi36A0V121)				1+2+3 (6) 2+4+3 (9)	2.19 GHz (TaishanV121) 2.18 GHz (TaishanV120) 1.40 GHz (Cortex-A510)						Q2 2024
Kirin 9020 (Hi36C0V110)			HiSilicon TaiShan	1+3+4 (8) 2+6+4 (12)	2.50 GHz (TaishanV123) 2.15 GHz (TaishanV120) 1.60 GHz (Taishan-Little)	HiSilicon Maleoon 920	840 MHz				Q4 2024
Kirin T92 (Hi36C0V110)											Q4 2024

Server processors

HiSilicon develops server processor SoCs based on the ARM architecture.

Hi1610

The Hi1610 is HiSilicon's first generation server processor announced in 2015.

It features:

• 16x ARM Cortex-A57 @ 2.1GHz cores
• 48KB L1-I, 32KB L1-D, 1MB L2/4 cores, 16MB CCN L3
• TSMC 16 nm process
• 2x DDR4-1866 memory
• 16x PCIe 3.0 ports

Hi1612

The Hi1612 is HiSilicon's second generation server processor launched in 2016.

It is the first chiplet-based Kunpeng with two computing dies. It features:

• 32x ARM Cortex-A57 @ 2.1GHz cores
• 48KB L1-I, 32KB L1-D, 1MB L2/4 cores, 32MB CCN L3
• TSMC 16 nm process
• 4x DDR4-2133 memory
• 16x PCIe 3.0 ports

Kunpeng 916 (Hi1616)

The Kunpeng 916 (Hi1616) is HiSilicon's third generation server processor launched in 2017.

The Kunpeng 916 is used in Huawei's TaiShan 2280 Balanced Server, TaiShan 5280 Storage Server,

TaiShan XR320 High-Density Server Node and TaiShan X6000 High-Density Server. It features:

• 32x ARM Cortex-A72 @ 2.4GHz cores
• 48KB L1-I, 32KB L1-D, 1MB L2/4 cores, 32MB CCN L3
• TSMC 16 nm process
• 4x DDR4-2400 memory
• 2-way SMP, Each socket has 2x ports with

96 Gbit/s per port (total of 192 Gbit/s)

• 46x PCIe 3.0 and 8x 10G Ethernet ports
• 85 W TBD

Kunpeng 920 (Hi1620)

The Kunpeng 920 (Hi1620) is HiSilicon's fourth generation server processor

announced in 2018, and launched in 2019. It features:

• 32 to 64x custom TaiShan V110 cores @ 2.6GHz cores
• The TaiShan V110 core is a 4-way superscalar, out-of-order

microarchitecture that implements the ARMv8.2-A ISA.

• The TaiShan V110 cores are likely a new core not based on ARM designs
• 3x Simple ALUs, 1x Complex MDU, 2x BRUs (sharing ports with ALU2/3),

2x FSUs (ASIMD FPU), 2x LSUs

• 64KB L1-I, 64KB L1-D, 512KB Private L2, 1MB L3/core (shared)
• TSMC 7 nm HPC process
• 8x DDR4-3200 memory
• 2-way and 4-way SMP, Each socket has 3x Hydra ports

with 240 Gbit/s per port (total of 720 Gbit/s)

• 40x PCIe 4.0 with CCIX support, 4x USB 3.0, 2x SATA 3.0,

8x SAS 3.0 and 2x 100G Ethernet ports

• TBD 100 to 200 W
• Compression engine (GZIP, LZS, LZ4) capable of up

to 40 Git/s compress and 100 Gbit/s decompress

• Crypto offload engine (for AES, DES, 3DES, SHA1/2)

capable of throughputs up to 100 Gbit/s

Kunpeng 930 (Hi1630)

The Kunpeng 930 (Hi1630) is HiSilicon's fifth-generation server processor

announced in 2019 and scheduled for launch in 2021. It features:

• 80 custom Taishan V120 cores @ 3GHz frequency, with support

for SMT and ARM's Scalable Vector Extension (SVE)

• 64KB L1-I, 64KB L1-D, 512KB Private L2 and 1MB L3/core (shared)
• TSMC 5 nm process
• 8x DDR5 memory

Kunpeng 950

The Kunpeng 950 is HiSilicon's sixth-generation server processor

announced in 2019 and scheduled for launch in 2023.