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Willow Cove µarch
General Info
Arch Type	CPU
Designer	Intel
Manufacturer	Intel
Introduction	2020
Process	10 nm
Core Configs	2, 4, 6, 8
Pipeline
OoOE	Yes
Speculative	Yes
Reg Renaming	Yes
Stages	14-19
Decode	5-way
Instructions
ISA	x86-64
Cores
Core Names	Tiger Lake
Succession
Sunny Cove Golden Cove
Contemporary
Cypress Cove

Willow Cove is the successor to Sunny Cove, a high-performance 10 nm x86 core microarchitecture designed by Intel for an array of server and client products, including Tiger Lake.

History

Intel Core roadmap

Willow Cove was originally unveiled by Intel at their 2018 architecture day. Willow Cove is intended to succeed Sunny Cove in the 2020 timeframe.

Process Technology

Willow Cove is designed to take advantage of Intel's 10 nm process (10nm SuperFin).

Architecture

Key changes from Sunny Cove

• Expanded L2 Cache (512KB 8-way → 1.25MB 20-way)
• 50% Expanded L3 Cache (8MB 16-way → 12MB 12-way)
• Memory Subsystem with more bandwidth and LPDDR5 support
• New Total Memory Encryption(TME) feature

This list is incomplete; you can help by expanding it.

New instructions

Willow Cove introduced a number of new instructions:

• Control-flow Enforcement Technology (CET) enhancements
• MOVDIR - Direct stores
• Additional AVX-512 extensions:
  • AVX512_VP2INTERSECT - AVX-512 Vector Intersection Instructions

Bibliography

• Intel Architecture Day 2018, December 11, 2018