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EPYC 7542
General Info
Designer	AMD
Manufacturer	TSMC, GlobalFoundries
Model Number	7542
Part Number	100-000000075
Market	Server
Introduction	August 7, 2019 (announced) August 7, 2019 (launched)
Shop	Amazon
General Specs
Family	EPYC
Series	7002
Locked	Yes
Frequency	2,900 MHz
Turbo Frequency	3,400 MHz
Clock multiplier	29
Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Zen 2
Core Name	Rome
Core Family	23
Process	7 nm, 14 nm
Technology	CMOS
MCP	Yes (5 dies)
Word Size	64 bit
Cores	32
Threads	64
Max Memory	4 TiB
Multiprocessing
Max SMP	2-Way (Multiprocessor)
Electrical
TDP	225 W
Packaging
Package	SP3, FCLGA-4094 (FC-OLGA)
Dimension	75.4 mm × 58.5 mm × 6.26 mm
Pitch	0.87 mm × 1 mm
Contacts	4094
Socket	SP3, LGA-4094

EPYC 7542 is a 64-bit dotriaconta-core x86 server microprocessor designed and introduced by AMD in mid-2019. This multi-chip processor, which is based on the Zen 2 microarchitecture, incorporates logic fabricated TSMC 7 nm process and I/O fabricated on GlobalFoundries 14 nm process. The 7542 has a TDP of 225 W with a base frequency of 2.9 GHz and a boost frequency of up to 3.4 GHz. This processor supports up to two-way SMP and up to 4 TiB of eight channels DDR4-3200 memory per socket.

Cache

Main article: Zen 2 § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 2 MiB 2,048 KiB 2,097,152 B L1I$ 1 MiB 1,024 KiB 1,048,576 B 32x32 KiB 8-way set associative   L1D$ 1 MiB 1,024 KiB 1,048,576 B 32x32 KiB 8-way set associative   L2$ 16 MiB 16,384 KiB 16,777,216 B 0.0156 GiB     32x512 KiB 8-way set associative write-back L3$ 128 MiB 131,072 KiB 134,217,728 B 0.125 GiB     8x16 MiB