Revision as of 12:12, 2 May 2019

TaiShan is a high-performance ARM server microarchitecture designed by HiSilicon for Huawei's own TaiShan servers.

Brands

TaiShan-based CPUs are branded as the Kunpeng 920 series.

Release Dates

Kunpeng 920 CPUs were officially launched in early 2019.

Architecture

• TSMC 7 nm HPC process

This list is incomplete; you can help by expanding it.

Block Diagram

Entire Chip

900px

Memory Hierarchy

• Cache
  • L1I Cache
    • 64 KiB/core, private
  • L1D Cache
    • 64 KiB/core, private
  • L2 Cache
    • 512 KiB/core, private
  • L3 Cache
    • 1 MiB/core
    • Shared by all cores
  • System DRAM
    • 1 TiB Max Memory / socket
    • 8 Channels
    • DDR4, up to 2933 MT/s
      • 1 DPC and 2 DPC support
    • 8 B/cycle/channel (@ memory clock)
    • ECC, SDDC, DDDC

Overview

This section is empty; you can help add the missing info by editing this page.

Core

This section is empty; you can help add the missing info by editing this page.

Scalability

This section is empty; you can help add the missing info by editing this page.

Die

• TSMC 7 nm HPC
• 20,000,000,000 transistors

All TaiShan Chips

This section is empty; you can help add the missing info by editing this page.

Bibliography

• Huawei. Personal Communication. 2019
• Huawei Connect 2018. October 2018
• HiSilicon Event. January 7, 2019