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Difference between revisions of "zhaoxin/microarchitectures/wudaokou"
< zhaoxin

(→‎Key changes from {{\\|Zhangjiang}}: more items)
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* [[FSB]] removed
 
* [[FSB]] removed
 
** x4 PCIe 3.0 communication with [[southbridge]] chipset
 
** x4 PCIe 3.0 communication with [[southbridge]] chipset
 +
* Chipset
 +
** Gigabit Ethernet port (RGMII)
 +
** USB 3.1 Gen2 (Type-C) ports
 +
** SATA 3.0 ports
 
{{expand list}}
 
{{expand list}}

Revision as of 23:02, 14 January 2018

Edit Values
WuDaoKou µarch
General Info
Arch TypeCPU
DesignerZhaoxin
ManufacturerHLMC
IntroductionDecember 28, 2017
Process28 nm
Core Configs2, 4, 8
Pipeline
TypeSuperscalar
OoOEYes
SpeculativeYes
Reg RenamingYes
Instructions
ISAx86-64
Succession

WuDaoKou is the successor to Zhangjiang, a 28 nm x86 microarchitecture designed by Zhaoxin for mainstream laptops, desktops, and servers.

Brands

Family Series Description
KaiXian KX (5000) Desktop, Laptops
Kaisheng KH (20000) Storage, Servers

Process Technology

WuDaoKou is manufactured on HLMC's 28 nm process.

Architecture

Key changes from Zhangjiang

  • 8 cores per die (up from 4)
  • SoC design
  • FSB removed
  • Chipset
    • Gigabit Ethernet port (RGMII)
    • USB 3.1 Gen2 (Type-C) ports
    • SATA 3.0 ports

This list is incomplete; you can help by expanding it.

Retrieved from "https://en.wikichip.org/w/index.php?title=zhaoxin/microarchitectures/wudaokou&oldid=72559"
Facts about "WuDaoKou - Microarchitectures - Zhaoxin"
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codenameWuDaoKou +
core count2 +, 4 + and 8 +
designerZhaoxin +
first launchedDecember 28, 2017 +
full page namezhaoxin/microarchitectures/wudaokou +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerHLMC + and SMIC +
microarchitecture typeCPU +
nameWuDaoKou +
pipeline stages18 +
process28 nm (0.028 μm, 2.8e-5 mm) +