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== Architecture ==
 
== Architecture ==
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The ARM6 microarchitecture (MacroCell) was used for the ARM60, ARM600, and the ARM610. The ARM250 borrowed much of the architecture but used an {{acorn|ARM3|l=arch}} core instead.
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The ARM6 microarchitecture (MacroCell) was used for the ARM60, ARM600, and the ARM610. The ARM250 borrowed much of the architecture but used an {{acorn|ARM3|l=arch}} core instead. The various ARM6 improvements were heavily influenced directly by [[Apple]]'s needs from their Newton PDA project.
  
 
=== Key changes from {{\\|ARM3}} ===
 
=== Key changes from {{\\|ARM3}} ===

Revision as of 01:44, 3 July 2017

Edit Values
ARM6 µarch
General Info
Arch TypeCPU
DesignerARM Holdings
ManufacturerVLSI Technology, GEC-Plessey Semiconductors, Sharp
Introduction1993
Process0.8 µm
Core Configs1
Pipeline
TypeScalar, Pipelined
Stages3
Decode1-way
Instructions
ISAARMv3
Cache
L1 Cache4 KiB/core
64-way set associative
Succession

ARM6 is an ARM microarchitecture designed by ARM Holdings and introduced in 1993 as a successor to the ARM3. This was the first design by ARM as an independent company after being spun-off from Acorn Computers.

History

See also: ARM's History

Following ARM's incorporation in November 1990 after being spun-off from Acorn Computers, ARM continued to develop the ARM microprocessor. In 1993 ARM introduced the ARM6 MacroCell, a substantial improvement over the previous ARM3 microarchitecture. The same year ARM signed with a number of additional licensees beyond VLSI Technology, including Sharp and GEC-Plessey.

The popularity of the ARM6 can be largely attributed to Apple's adaptation of the processor in their Newton PDAs.

Process Technology

See also: 0.8 µm process

The ARM6 was implemented on a 0.8 µm CMOS process.

Architecture

The ARM6 microarchitecture (MacroCell) was used for the ARM60, ARM600, and the ARM610. The ARM250 borrowed much of the architecture but used an ARM3 core instead. The various ARM6 improvements were heavily influenced directly by Apple's needs from their Newton PDA project.

Key changes from ARM3

  • 32-bit address space (from 26-bit)
  • New Modes
    • Abort (abt)
    • Undefined (und)
  • Virtual memory
    • Integrated MMU
  • Write Buffer

New instructions

New ARM6 instructions:

Movement:

  • MRS - Move from register to CPSR/SPSR
  • MSR - Move from CPSR/SPSR to register

Memory Hierarchy

  • Cache
    • L1 Cache (unified)
      • 4 KiB, 64-way set associative
      • 16 B line size
      • Write-through policy
      • Per core
  • System DRAM
    • Up to 4 GiB

Overview

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Die

ARM6 MacroCell

  • 3.1 mm x 1.9 mm
  • 5.89 mm² die size
  • 54 mW @ 20 MHz @ 3 Volt
  • 0.8 µm CMOS
  • 35,530 transistors

ARM610

  • 26.45 mm² die size
  • 358,931 transistors
  • TQFP-144

The ARM610 fabricated by GEC-Plessey, on a 0.8 µm process, reported to be 8.87 mm x 8.67 for a total die size of 76.9 mm².

All ARM6 Chips

 List of ARM6-based Processors
ModelManufacturerCoreLaunchedFrequencyPower DissipationMax Memory
VY86C060VLSI TechnologyARM60199320 MHz
0.02 GHz
20,000 kHz
, 25 MHz
0.025 GHz
25,000 kHz
4 GiB
4,096 MiB
4,194,304 KiB
4,294,967,296 B
0.00391 TiB
VY86C06020VLSI TechnologyARM60199420 MHz
0.02 GHz
20,000 kHz
4 GiB
4,096 MiB
4,194,304 KiB
4,294,967,296 B
0.00391 TiB
VY86C06040VLSI TechnologyARM60199440 MHz
0.04 GHz
40,000 kHz
4 GiB
4,096 MiB
4,194,304 KiB
4,294,967,296 B
0.00391 TiB
VY86C060AVLSI TechnologyARM60199433 MHz
0.033 GHz
33,000 kHz
4 GiB
4,096 MiB
4,194,304 KiB
4,294,967,296 B
0.00391 TiB
VY86C061VLSI TechnologyARM60199320 MHz
0.02 GHz
20,000 kHz
, 25 MHz
0.025 GHz
25,000 kHz
4 GiB
4,096 MiB
4,194,304 KiB
4,294,967,296 B
0.00391 TiB
VY86C610VLSI TechnologyARM610199320 MHz
0.02 GHz
20,000 kHz
, 25 MHz
0.025 GHz
25,000 kHz
4 GiB
4,096 MiB
4,194,304 KiB
4,294,967,296 B
0.00391 TiB
VY86C610CVLSI TechnologyARM61023 July 199433 MHz
0.033 GHz
33,000 kHz
0.5 W
500 mW
6.705e-4 hp
5.0e-4 kW
4 GiB
4,096 MiB
4,194,304 KiB
4,294,967,296 B
0.00391 TiB
Count: 7

References

  • Muller, Mike. "ARM6: a high performance low power consumption macrocell." Compcon Spring'93, Digest of Papers.. IEEE, 1993.
  • Licensees, Welcomes New. "ARM Semiconductor Welcomes New Licensees." Microelectronics Journal 24.7 (1993): 7.
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Facts about "ARM6 - Microarchitectures - ARM"
RDF feed
codenameARM6 +
core count1 +
designerARM Holdings +
first launched1993 +
full page namearm holdings/microarchitectures/arm6 +
instance ofmicroarchitecture +
instruction set architectureARMv3 +
manufacturerVLSI Technology +, GEC-Plessey Semiconductors + and Sharp +
microarchitecture typeCPU +
nameARM6 +
pipeline stages3 +
process800 nm (0.8 μm, 8.0e-4 mm) +