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'''Cannonlake''' ('''CNL''') (formerly '''Skymont''') is a planned [[microarchitecture]] by [[Intel]] as a successor to {{\\|Kaby Lake}}. Cannonlake is expected to be fabricated using a [[10 nm process]] and is set to be introduced in the fourth quarter of [[2017]]. Cannonlake is the "Process" microarchitecture as part of Intel's {{intel|PAO}} model.
 
'''Cannonlake''' ('''CNL''') (formerly '''Skymont''') is a planned [[microarchitecture]] by [[Intel]] as a successor to {{\\|Kaby Lake}}. Cannonlake is expected to be fabricated using a [[10 nm process]] and is set to be introduced in the fourth quarter of [[2017]]. Cannonlake is the "Process" microarchitecture as part of Intel's {{intel|PAO}} model.
  
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For desktop and mobile, Cannonlake is expected to be branded as 8th Generation Intel {{intel|Core i3}}, {{intel|Core i5}}. and {{intel|Core i7}} processors. For server class processors, Intel is expected to brand it as {{intel|Xeon E3|Xeon E3 v7}}, {{intel|Xeon E5|Xeon E5 v7}}, and {{intel|Xeon E7|Xeon E7 v7}}.
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For mobile, Cannonlake is expected to be branded as 8th Generation Intel {{intel|Core i3}}, {{intel|Core i5}}. and {{intel|Core i7}} processors. There will be no desktop Cannonlake models.
  
 
== Process Technology ==
 
== Process Technology ==
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== Codenames ==
 
== Codenames ==
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Intel cancelled Desktop Cannonlake models.
 +
 
{| class="wikitable"
 
{| class="wikitable"
 
|-
 
|-
 
! Core !! Abbrev !! Description !! Graphics !! Target
 
! Core !! Abbrev !! Description !! Graphics !! Target
 
|-
 
|-
−
| Cannonlake Y || CNL-Y || Extremely low power || GT2 || 2-in-1s detachable, tablets, and computer sticks
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| {{intel|Cannonlake Y|l=core}} || KBL-Y || Extremely low power || GT2 || 2-in-1s detachable, tablets, and computer sticks
 +
|-
 +
| {{intel|Cannonlake U|l=core}} || KBL-U || Ultra-low Power || GT2/GT3 || Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room
 
|-
 
|-
−
| Cannonlake U || CNL-U || Ultra-low Power || GT2 || Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room
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| {{intel|Cannonlake H|l=core}} || KBL-H || High-performance Graphics || GT2/GT3 || Ultimate mobile performance, mobile workstations
 +
|- style="text-decoration: line-through;"
 +
| {{intel|Cannonlake S|l=core}} || KBL-S || Performance-optimized lifestyle || GT2/GT3 || Desktop performance to value, AiOs, and minis
 +
|- style="text-decoration: line-through;"
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| {{intel|Cannonlake DT|l=core}} || KBL-DT || Workstation || GT2 || Workstations & entry-level servers
 
|}
 
|}
  

Revision as of 20:08, 27 July 2017

Edit Values
Cannonlake µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
Introduction2017
Process10 nm
Cores
Core NamesCannonlake Y,
Cannonlake U
Succession

Cannonlake (CNL) (formerly Skymont) is a planned microarchitecture by Intel as a successor to Kaby Lake. Cannonlake is expected to be fabricated using a 10 nm process and is set to be introduced in the fourth quarter of 2017. Cannonlake is the "Process" microarchitecture as part of Intel's PAO model.

For mobile, Cannonlake is expected to be branded as 8th Generation Intel Core i3, Core i5. and Core i7 processors. There will be no desktop Cannonlake models.

Process Technology

Cannonlake is manufactured on Intel's 10 nm process (P1274). Intel's 10 nm process is the first high-volume manufacturing process to employ Self-Aligned Quad Patterning (SAQP) (goes under the "Hyper-Scaling" marketing name). Intel's 10nm features a 0.0367 µm² SRAM bit cell.

Scaling:

Broadwell Cannonlake Δ intel 10nm fin.png
14 nm 10 nm
Fin Pitch 42 nm 34 0.81x
Fin Width​ 8 nm  ? nm  ?x
Fin Height​ 42 nm 53 nm 1.24x
Gate Pitch 70 nm 54 nm 0.77x
Interconnect Pitch 52 nm 36 nm 0.69x
Cell Height 399 nm 272 nm 0.68x

Codenames

Intel cancelled Desktop Cannonlake models.

Core Abbrev Description Graphics Target
Cannonlake Y KBL-Y Extremely low power GT2 2-in-1s detachable, tablets, and computer sticks
Cannonlake U KBL-U Ultra-low Power GT2/GT3 Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room
Cannonlake H KBL-H High-performance Graphics GT2/GT3 Ultimate mobile performance, mobile workstations
Cannonlake S KBL-S Performance-optimized lifestyle GT2/GT3 Desktop performance to value, AiOs, and minis
Cannonlake DT KBL-DT Workstation GT2 Workstations & entry-level servers

Architecture

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Key changes from Kaby Lake

All Cannonlake Chips

 Cannonlake Chips
 Main processorIGPMajor Feature Diff
ModelLaunchedPriceFamilyPlatformCoreCTL3$L4$TDPFreqTurboMax MemNameFreqTurboTBTHTAVX2TXTTSXvProVT-d
 Uniprocessors
 No Cannonlake Chips have been released yet.
Count: 0

References

  • Mark Bohr, Intel. Intel Technology and Manufacturing Day. Mar 28, 2017.

See also

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/cannon_lake&oldid=56512"
Facts about "Cannon Lake - Microarchitectures - Intel"
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codenameCannonlake +
designerIntel +
first launched2017 +
full page nameintel/microarchitectures/cannon lake +
instance ofmicroarchitecture +
manufacturerIntel +
microarchitecture typeCPU +
nameCannonlake +
process10 nm (0.01 μm, 1.0e-5 mm) +