Semiconductor & Computer Engineering
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Difference between revisions of "amd/cores/applebred"
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| − | '''Applebred''' was [[AMD]]'s core name for third generation {{amd|Duron}} microprocessors, a successor to {{amd|Morgan|l=core}}. Applebred is based on the {{amd|K7|l1=arch}} microarchitecture and was manufactured on AMD's newer [[130 nm process]]. | + | '''Applebred''' was [[AMD]]'s core name for third generation {{amd|Duron}} microprocessors, a successor to {{amd|Morgan|l=core}}. Applebred is based on the {{amd|K7|l1=arch}} microarchitecture and was manufactured on AMD's newer [[130 nm process]]. AMD originally slated to release "{{amd|Appaloosa|l=core}}" as a successor to Morgan, however this was scrapped later on for unknown reasons. Applebred ended up being based on Appaloosa. |
== Features == | == Features == | ||
Latest revision as of 14:04, 7 November 2016
| Edit Values | |
| Applebred | |
 | |
| General Info | |
| Designer | AMD |
| Manufacturer | AMD |
| Introduction | August 2003 (announced) August 2003 (launched) |
| Microarchitecture | |
| ISA | IA-32 |
| Microarchitecture | K7 |
| Word Size | 4 octets 32 bit8 nibbles |
| Process | 130 nm 0.13 μm 1.3e-4 mm |
| Technology | CMOS |
| Clock | 1400 MHz - 1800 MHz |
| Succession | |
Applebred was AMD's core name for third generation Duron microprocessors, a successor to Morgan. Applebred is based on the K7 microarchitecture and was manufactured on AMD's newer 130 nm process. AMD originally slated to release "Appaloosa" as a successor to Morgan, however this was scrapped later on for unknown reasons. Applebred ended up being based on Appaloosa.
Features[edit]
- K7-based.
- Die shrink from 180 nm to a 130 nm process
- Base frequency of 1.4 GHz - 1.8 GHz
- 133.33 MHz FSB (up from 100) DDR (266.66 MT/s effective throughput)
- MMX, Extended MMX, 3DNow!, Extended 3DNow!, and SSE
- Cache data hardware prefetcher
Members[edit]
,,| Applebred-based Desktop Models | |||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Model | Family | Segment | Launched | Process | Freq | Mult. | Bus | Max Mem | VCORE | Package | Min Tcase | Max Tcase | OPN |
| Duron 1400 | Duron | Desktop | 15 August 2003 | 130 nm 0.13 μm 1.3e-4 mm | 1,400 MHz 1.4 GHz 1,400,000 kHz | 10.5 | 133.33 MHz 0.133 GHz 133,330 kHz | 4,096 MiB 4,194,304 KiB 4,294,967,296 B 4 GiB 0.00391 TiB | 1.5 V 15 dV 150 cV 1,500 mV | 0 °C 273.15 K 32 °F 491.67 °R | 85 °C 358.15 K 185 °F 644.67 °R | DHD1400DLV1C | |
| Duron 1600 | Duron | Desktop | 15 August 2003 | 130 nm 0.13 μm 1.3e-4 mm | 1,600 MHz 1.6 GHz 1,600,000 kHz | 12 | 133.33 MHz 0.133 GHz 133,330 kHz | 4,096 MiB 4,194,304 KiB 4,294,967,296 B 4 GiB 0.00391 TiB | 1.5 V 15 dV 150 cV 1,500 mV | 0 °C 273.15 K 32 °F 491.67 °R | 85 °C 358.15 K 185 °F 644.67 °R | DHD1600DLV1C | |
| Duron 1800 | Duron | Desktop | 15 August 2003 | 130 nm 0.13 μm 1.3e-4 mm | 1,800 MHz 1.8 GHz 1,800,000 kHz | 13.5 | 133.33 MHz 0.133 GHz 133,330 kHz | 4,096 MiB 4,194,304 KiB 4,294,967,296 B 4 GiB 0.00391 TiB | 1.5 V 15 dV 150 cV 1,500 mV | 0 °C 273.15 K 32 °F 491.67 °R | 85 °C 358.15 K 185 °F 644.67 °R | DHD1800DLV1C | |
| Count: 3 | |||||||||||||
See also[edit]
Facts about "Applebred - Cores - AMD"
| designer | AMD + |
| first announced | August 2003 + |
| first launched | August 2003 + |
| instance of | core + |
| isa | IA-32 + |
| manufacturer | AMD + |
| microarchitecture | K7 + |
| name | Applebred + |
| process | 130 nm (0.13 μm, 1.3e-4 mm) + |
| technology | CMOS + |
| word size | 32 bit (4 octets, 8 nibbles) + |