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(thunderx2)
 
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| first announced  = May 30, 2016
 
| first announced  = May 30, 2016
 
| first launched    = May 7, 2018
 
| first launched    = May 7, 2018
−
| isa              = ARMv8
+
| isa              = ARMv8.1
 
| microarch        = ThunderX2
 
| microarch        = ThunderX2
 
| microarch 2      = Vulcan
 
| microarch 2      = Vulcan
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| predecessor      = ThunderX
 
| predecessor      = ThunderX
 
| predecessor link = cavium/thunderx
 
| predecessor link = cavium/thunderx
−
| successor        =  
+
| successor        = ThunderX3
−
| successor link  =  
+
| successor link  = marvell/thunderx3
 
}}
 
}}
−
'''ThunderX2''' is a family of {{arch|64}} [[multi-core]] [[ARM]] server microprocessors introduced by Cavium in early [[2018]] succeeding the original {{\\|ThunderX}} line.
+
'''ThunderX2''' is a family of {{arch|64}} [[multi-core]] [[ARM]] server microprocessors introduced by [[Cavium]] in early [[2018]] succeeding the original {{\\|ThunderX}} line.
 +
 
 +
== Overview ==
 +
The ThunderX2 was designed to succeed the original {{\\|ThunderX}} family. [[Cavium]] first announced the ThunderX2 back in May 30 2016 with models based on their own {{cavium|thunderx2|second-generation|l=arch}} microarchitecture with models up to 54 cores. Cavium focused the {{\\|ThunderX}} design on the networking space as the {{\\|Octeon TX}} family, and in late 2016 they acquired the {{cavium|Vulcan|l=arch}} design from [[Broadcom]] which has designed a server microprocessor but has given up on the project for reasons not well understood. In early 2018, Cavium announced that their ThunderX2 processors (now based on {{cavium|Vulcan|l=arch}}) have reached general availability.
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 +
== Models ==
 +
=== CN99xx ===
 +
{{see also|cavium/microarchitectures/vulcan|l1=Vulcan microarchitecture}}
 +
The first parts of the ThunderX2 family, CN99xx series, that made it to general availability are based on the {{cavium|Vulcan|l=arch}} microarchitecture. Those parts are different from Cavium's original ThunderX2 design which started sampling in 2016. Originally designed by [[Broadcom]], those parts have much higher performance and a slightly different set of features. All parts have the following features in common.
 +
 
 +
* '''Mem:''' Up to 2 TiB of quad/hexa/octa- channel DDR4 2666 MT/s memory
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** Up to 4 TiB in dual-socket configuration
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* '''ISA:''' [[arm|ARMv8.1]], 128-bit {{arm|NEON}} SIMD
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* '''I/O:''' x48, x56 PCIe Gen 3 Lanes
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* Only the [[arm/aarch64 | 64-bit AArch64]] execution state is support. No [[arm/aarch32 | 32-bit AArch32]] support.
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          Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips
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{{comp table start}}
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<table class="comptable sortable tc3 tc4 tc6">
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{{comp table header|main|5:List of Vulcan-based Processors}}
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{{comp table header|main|5:Main processor}}
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{{comp table header|cols|Launched|Cores|Threads|%Frequency|PCIe Lanes}}
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{{#ask: [[Category:microprocessor models by cavium]] [[microarchitecture::Vulcan]]
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|?full page name
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|?model number
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|?first launched
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|?core count
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|?thread count
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|?base frequency#GHz
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|?Has subobject.max pcie lanes
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|format=template
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|template=proc table 3
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|userparam=7
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|mainlabel=-
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|valuesep=,
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}}
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{{comp table count|ask=[[Category:microprocessor models by cavium]] [[microarchitecture::Vulcan]]}}
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</table>
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{{comp table end}}
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== See also ==
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* [http://www.marvell.com/server-processors/thunderx2-arm-processors/index.jsp Marvell ThunderX2 Arm Processors]
 +
* [http://www.marvell.com/documents/hrur6mybdvk5uki1w0z7/ Marvell ThunderX2 CN99XX PMU Events (Abridged)]
 +
* Qualcomm's {{qualcomm|Centriq}}
 +
* Intel's {{intel|Xeon Platinum}}, {{intel|Xeon Gold|Gold}}, and {{intel|Xeon Silver|Silver}}

Latest revision as of 19:33, 26 April 2019

ThunderX2
ThunderX2 logo.png
ThunderX2
Developer Cavium
Manufacturer TSMC
Type Microprocessors
Introduction May 30, 2016 (announced)
May 7, 2018 (launch)
ISA ARMv8.1
µarch ThunderX2, Vulcan
Word size 64 bit
8 octets
16 nibbles
Process 14 nm
0.014 μm
1.4e-5 mm
, 16 nm
0.016 μm
1.6e-5 mm
Technology CMOS
Clock 2,500 MHz-1,600 MHz
Succession
← →
ThunderX ThunderX3

ThunderX2 is a family of 64-bit multi-core ARM server microprocessors introduced by Cavium in early 2018 succeeding the original ThunderX line.

Overview[edit]

The ThunderX2 was designed to succeed the original ThunderX family. Cavium first announced the ThunderX2 back in May 30 2016 with models based on their own second-generation microarchitecture with models up to 54 cores. Cavium focused the ThunderX design on the networking space as the Octeon TX family, and in late 2016 they acquired the Vulcan design from Broadcom which has designed a server microprocessor but has given up on the project for reasons not well understood. In early 2018, Cavium announced that their ThunderX2 processors (now based on Vulcan) have reached general availability.

Models[edit]

CN99xx[edit]

See also: Vulcan microarchitecture

The first parts of the ThunderX2 family, CN99xx series, that made it to general availability are based on the Vulcan microarchitecture. Those parts are different from Cavium's original ThunderX2 design which started sampling in 2016. Originally designed by Broadcom, those parts have much higher performance and a slightly different set of features. All parts have the following features in common.

  • Mem: Up to 2 TiB of quad/hexa/octa- channel DDR4 2666 MT/s memory
    • Up to 4 TiB in dual-socket configuration
  • ISA: ARMv8.1, 128-bit NEON SIMD
  • I/O: x48, x56 PCIe Gen 3 Lanes
  • Only the 64-bit AArch64 execution state is support. No 32-bit AArch32 support.
 List of Vulcan-based Processors
 Main processor
ModelLaunchedCoresThreadsFrequencyPCIe Lanes
CN99607 May 201816641.6 GHz
1,600 MHz
1,600,000 kHz
, 1.8 GHz
1,800 MHz
1,800,000 kHz
, 2 GHz
2,000 MHz
2,000,000 kHz
, 2.2 GHz
2,200 MHz
2,200,000 kHz
CN99657 May 201820401.8 GHz
1,800 MHz
1,800,000 kHz
, 2 GHz
2,000 MHz
2,000,000 kHz
, 2.1 GHz
2,100 MHz
2,100,000 kHz
, 2.2 GHz
2,200 MHz
2,200,000 kHz
, 2.3 GHz
2,300 MHz
2,300,000 kHz
, 2.4 GHz
2,400 MHz
2,400,000 kHz
, 2.5 GHz
2,500 MHz
2,500,000 kHz
CN99707 May 201824961.8 GHz
1,800 MHz
1,800,000 kHz
, 2 GHz
2,000 MHz
2,000,000 kHz
, 2.1 GHz
2,100 MHz
2,100,000 kHz
, 2.2 GHz
2,200 MHz
2,200,000 kHz
, 2.3 GHz
2,300 MHz
2,300,000 kHz
, 2.4 GHz
2,400 MHz
2,400,000 kHz
, 2.5 GHz
2,500 MHz
2,500,000 kHz
CN99757 May 2018281121.8 GHz
1,800 MHz
1,800,000 kHz
, 2 GHz
2,000 MHz
2,000,000 kHz
, 2.1 GHz
2,100 MHz
2,100,000 kHz
, 2.2 GHz
2,200 MHz
2,200,000 kHz
, 2.3 GHz
2,300 MHz
2,300,000 kHz
, 2.4 GHz
2,400 MHz
2,400,000 kHz
CN99787 May 2018301201.8 GHz
1,800 MHz
1,800,000 kHz
, 2 GHz
2,000 MHz
2,000,000 kHz
, 2.1 GHz
2,100 MHz
2,100,000 kHz
, 2.2 GHz
2,200 MHz
2,200,000 kHz
, 2.3 GHz
2,300 MHz
2,300,000 kHz
CN99807 May 2018321282 GHz
2,000 MHz
2,000,000 kHz
, 2.1 GHz
2,100 MHz
2,100,000 kHz
, 2.2 GHz
2,200 MHz
2,200,000 kHz
, 2.3 GHz
2,300 MHz
2,300,000 kHz
, 2.4 GHz
2,400 MHz
2,400,000 kHz
, 2.5 GHz
2,500 MHz
2,500,000 kHz
Count: 6

See also[edit]

Retrieved from "https://en.wikichip.org/w/index.php?title=cavium/thunderx2&oldid=89266"
Facts about "ThunderX2 - Cavium"
RDF feed
designerCavium +
first announcedMay 30, 2016 +
first launchedMay 7, 2018 +
full page namecavium/thunderx2 +
instance ofmicroprocessor family +
instruction set architectureARMv8 +
main designerCavium +
manufacturerTSMC +
microarchitectureThunderX2 + and Vulcan +
nameThunderX2 +
process14 nm (0.014 μm, 1.4e-5 mm) + and 16 nm (0.016 μm, 1.6e-5 mm) +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +