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ThunderX2 CN9960 - Cavium
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ThunderX2 CN9960
General Info
DesignerCavium
ManufacturerTSMC
Model NumberCN9960
Part NumberCN9960-2200LG4077-Y21-G,
CN9960-2000LG4077-Y21-G,
CN9960-1800LG4077-Y21-G,
CN9960-1600LG4077-Y21-G
MarketServer
IntroductionMay 7, 2018 (announced)
May 7, 2018 (launched)
General Specs
FamilyThunderX2
Frequency1,600 MHz, 1,800 MHz, 2,000 MHz, 2,200 MHz
Microarchitecture
ISAARMv8.1 (ARM)
MicroarchitectureVulcan
Process16 nm
TechnologyCMOS
Word Size64 bit
Cores16
Threads64
Max CPUs2 (Multiprocessor)
Max Memory2 TiB
Packaging
PackageFCLGA-4077 (LGA)
Contacts4077

ThunderX2 CN9960 is a 64-bit hexadeca-core high-performance ARM server microprocessor introduced by Cavium in mid-2018. The microprocessor, which is based on the Vulcan microarchitecture, is fabricated on TSMC's 16 nm process. Depending on the exact SKU, the CN9960 operates between 1.6 GHz and 2.2 GHz and supports up to quad-channel DDR4-2666 memory.

Cache[edit]

Main article: Vulcan § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
L1I$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
16x32 KiB8-way set associative 
L1D$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
16x32 KiB8-way set associative 

L2$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  16x256 KiB8-way set associative 

L3$16 MiB
16,384 KiB
16,777,216 B
0.0156 GiB
  16x1 MiB  

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2666
Supports ECCYes
Max Mem2 TiB
Controllers2
Channels4
Max Bandwidth79.47 GiB/s
Bandwidth
Single 19.87 GiB/s
Double 39.74 GiB/s
Quad 79.47 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 48
Configuration: x16, x8, x4, x1
SATARevision: 3
Max Ports: 2
USBRevision: 3
Max Ports: 2


Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported ARM Extensions & Processor Features
NEONAdvanced SIMD extension
TrustZoneTrustZone Security Extensions
PMUv3ARMv8 PMUv3 Performance Monitors Extension
CRC32CRC-32 checksum Extension
CryptoCryptographic Extension
FPFloating-point Extension
SIMDAdvanced SIMD extension
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
ThunderX2 CN9960 - Cavium#pcie +
base frequency1,600 MHz (1.6 GHz, 1,600,000 kHz) +, 1,800 MHz (1.8 GHz, 1,800,000 kHz) +, 2,000 MHz (2 GHz, 2,000,000 kHz) + and 2,200 MHz (2.2 GHz, 2,200,000 kHz) +
core count16 +
designerCavium +
familyThunderX2 +
first announcedMay 7, 2018 +
first launchedMay 7, 2018 +
full page namecavium/thunderx2/cn9960 +
has ecc memory supporttrue +
instance ofmicroprocessor +
isaARMv8.1 +
isa familyARM +
l1$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l1d$ description8-way set associative +
l1d$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l1i$ description8-way set associative +
l1i$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l2$ description8-way set associative +
l2$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l3$ size16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) +
ldateMay 7, 2018 +
manufacturerTSMC +
market segmentServer +
max cpu count2 +
max memory2,097,152 MiB (2,147,483,648 KiB, 2,199,023,255,552 B, 2,048 GiB, 2 TiB) +
max memory channels4 +
max sata ports2 +
max usb ports2 +
microarchitectureVulcan +
model numberCN9960 +
nameThunderX2 CN9960 +
packageFCLGA-4077 +
part numberCN9960-2200LG4077-Y21-G +, CN9960-2000LG4077-Y21-G +, CN9960-1800LG4077-Y21-G + and CN9960-1600LG4077-Y21-G +
process16 nm (0.016 μm, 1.6e-5 mm) +
supported memory typeDDR4-2666 +
technologyCMOS +
thread count64 +
word size64 bit (8 octets, 16 nibbles) +