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Difference between revisions of "intel/core i5/i5-9500"
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{{intel title|Core i5-9500}}
 
{{intel title|Core i5-9500}}
−
{{mpu
+
{{chip
−
|future=Yes
 
 
|name=Core i5-9500
 
|name=Core i5-9500
−
|no image=Yes
+
|image=coffee lake s (front).png
 
|designer=Intel
 
|designer=Intel
 
|manufacturer=Intel
 
|manufacturer=Intel
 
|model number=i5-9500
 
|model number=i5-9500
 +
|part number=CM8068403362610
 +
|s-spec=SRF4B
 
|market=Desktop
 
|market=Desktop
 +
|first announced=April 23, 2019
 +
|first launched=April 23, 2019
 +
|release price (tray)=$192.00
 +
|release price (box)=$202.00
 
|family=Core i5
 
|family=Core i5
 
|series=i5-9000
 
|series=i5-9000
 
|locked=Yes
 
|locked=Yes
 +
|frequency=3,000 MHz
 +
|turbo frequency1=4,400 MHz
 +
|bus type=DMI 3.0
 +
|bus links=4
 +
|bus rate=8 GT/s
 +
|clock multiplier=30
 
|isa=x86-64
 
|isa=x86-64
 
|isa family=x86
 
|isa family=x86
−
|microarch=Ice Lake
+
|microarch=Coffee Lake
−
|core name=Ice Lake S
+
|platform=Coffee Lake
−
|process=10 nm
+
|chipset=Cannon Point
 +
|core name=Coffee Lake R
 +
|core family=6
 +
|core model=158
 +
|core stepping=U0
 +
|process=14 nm
 
|technology=CMOS
 
|technology=CMOS
 +
|die area=149 mm²
 
|word size=64 bit
 
|word size=64 bit
 
|core count=6
 
|core count=6
−
|thread count=12
+
|thread count=6
 
|max cpus=1
 
|max cpus=1
−
|max memory=64 GiB
+
|max memory=128 GiB
 
|tdp=65 W
 
|tdp=65 W
 +
|tjunc min=0 °C
 +
|tjunc max=100 °C
 +
|package module 1={{packages/intel/lga-1151}}
 
}}
 
}}
−
'''Core i5-9500''' is a planned {{arch|64}} mid-range performance [[x86]] desktop processor by [[Intel]] set to be introduced in [[2018]]. The i5-9400 is fabricated on Intel's 2nd generation [[10 nm process|10nm+ process]] based on the {{intel|Ice Lake|l=arch}} microarchitecture.
+
'''Core i5-9500''' is a {{arch|64}} [[hexa-core]] mid-range performance [[x86]] desktop microprocessor introduced by [[Intel]] in early [[2019]]. This processor, which is based on the {{intel|Coffee Lake|l=arch}} microarchitecture, is manufactured on Intel's 3rd generation enhanced [[14 nm process|14nm++ process]]. The i5-9500 operates at a 3 GHz with a TDP of 65 W and a {{intel|Turbo Boost}} frequency of up to 4.4 GHz. This chip supports up to 128 GiB of dual-channel DDR4-2666 memory and incorporates Intel's {{intel|UHD Graphics 630}} IGP operating at 350 MHz with a burst frequency of 1.1 GHz.
−
 
 
−
 
 
−
{{unknown features}}
 
−
 
 
−
 
 
−
{{leaked info}}
 
  
  
 
== Cache ==
 
== Cache ==
−
{{main|intel/microarchitectures/ice_lake#Memory_Hierarchy|l1=Ice Lake § Cache}}
+
{{main|intel/microarchitectures/coffee_lake#Memory_Hierarchy|l1=Coffee Lake § Cache}}
 
{{cache size
 
{{cache size
−
|l1 cache=512 KiB
+
|l1 cache=384 KiB
−
|l1i cache=256 KiB
+
|l1i cache=192 KiB
−
|l1i break=8x32 KiB
+
|l1i break=6x32 KiB
 
|l1i desc=8-way set associative
 
|l1i desc=8-way set associative
−
|l1d cache=256 KiB
+
|l1d cache=192 KiB
−
|l1d break=8x32 KiB
+
|l1d break=6x32 KiB
 
|l1d desc=8-way set associative
 
|l1d desc=8-way set associative
 
|l1d policy=write-back
 
|l1d policy=write-back
−
|l2 cache=2 MiB
+
|l2 cache=1.5 MiB
−
|l2 break=8x256 KiB
+
|l2 break=6x256 KiB
 
|l2 desc=4-way set associative
 
|l2 desc=4-way set associative
 
|l2 policy=write-back
 
|l2 policy=write-back
−
|l3 cache=12 MiB
+
|l3 cache=9 MiB
−
|l3 break=6x2 MiB
+
|l3 break=6x1.5 MiB
−
|l3 desc=16-way set associative
+
|l3 desc=12-way set associative
 
|l3 policy=write-back
 
|l3 policy=write-back
 +
}}
 +
 +
== Memory controller ==
 +
{{memory controller
 +
|type=DDR4-2666
 +
|ecc=No
 +
|max mem=128 GiB
 +
|controllers=1
 +
|channels=2
 +
|max bandwidth=39.74 GiB/s
 +
|bandwidth schan=19.87 GiB/s
 +
|bandwidth dchan=39.74 GiB/s
 +
}}
 +
 +
== Expansions ==
 +
{{expansions main
 +
|
 +
{{expansions entry
 +
|type=PCIe
 +
|pcie revision=3.0
 +
|pcie lanes=16
 +
|pcie config=1x16
 +
|pcie config 2=2x8
 +
|pcie config 3=1x8+2x4
 +
}}
 +
}}
 +
 +
== Graphics ==
 +
{{integrated graphics
 +
| gpu                = UHD Graphics 630
 +
| device id          = 0x3E92
 +
| designer            = Intel
 +
| execution units    = 24
 +
| max displays        = 3
 +
| max memory          = 64 GiB
 +
| frequency          = 350 MHz
 +
| max frequency      = 1,100 MHz
 +
 +
| output crt          =
 +
| output sdvo        =
 +
| output dsi          =
 +
| output edp          = Yes
 +
| output dp          = Yes
 +
| output hdmi        = Yes
 +
| output vga          =
 +
| output dvi          = Yes
 +
 +
| directx ver        = 12
 +
| opengl ver        = 4.5
 +
| opencl ver        = 2.0
 +
| hdmi ver          = 1.4a
 +
| dp ver            = 1.2
 +
| edp ver            = 1.4
 +
| max res hdmi      = 4096x2304
 +
| max res hdmi freq  = 24 Hz
 +
| max res dp        = 4096x2304
 +
| max res dp freq    = 60 Hz
 +
| max res edp        = 4096x2304
 +
| max res edp freq  = 60 Hz
 +
| max res vga        =
 +
| max res vga freq  =
 +
 +
| features            = Yes
 +
| intel quick sync    = Yes
 +
| intel intru 3d      = Yes
 +
| intel insider        =
 +
| intel widi          =
 +
| intel fdi            =
 +
| intel clear video    = Yes
 +
| intel clear video hd = Yes
 +
}}
 +
{{coffee lake hardware accelerated video table|col=1}}
 +
 +
== Features ==
 +
{{x86 features
 +
|real=Yes
 +
|protected=Yes
 +
|smm=Yes
 +
|fpu=Yes
 +
|x8616=Yes
 +
|x8632=Yes
 +
|x8664=Yes
 +
|nx=Yes
 +
|mmx=Yes
 +
|emmx=Yes
 +
|sse=Yes
 +
|sse2=Yes
 +
|sse3=Yes
 +
|ssse3=Yes
 +
|sse41=Yes
 +
|sse42=Yes
 +
|sse4a=No
 +
|avx=Yes
 +
|avx2=Yes
 +
|avx512f=No
 +
|avx512cd=No
 +
|avx512er=No
 +
|avx512pf=No
 +
|avx512bw=No
 +
|avx512dq=No
 +
|avx512vl=No
 +
|avx512ifma=No
 +
|avx512vbmi=No
 +
|avx5124fmaps=No
 +
|avx512vnni=No
 +
|avx5124vnniw=No
 +
|avx512vpopcntdq=No
 +
|abm=Yes
 +
|tbm=No
 +
|bmi1=Yes
 +
|bmi2=Yes
 +
|fma3=Yes
 +
|fma4=No
 +
|aes=Yes
 +
|rdrand=Yes
 +
|sha=No
 +
|xop=No
 +
|adx=Yes
 +
|clmul=Yes
 +
|f16c=Yes
 +
|bfloat16=No
 +
|tbt1=No
 +
|tbt2=Yes
 +
|tbmt3=No
 +
|bpt=No
 +
|eist=Yes
 +
|sst=No
 +
|flex=No
 +
|fastmem=No
 +
|ivmd=No
 +
|intelnodecontroller=No
 +
|intelnode=No
 +
|kpt=No
 +
|ptt=No
 +
|intelrunsure=No
 +
|mbe=No
 +
|isrt=No
 +
|sba=No
 +
|mwt=No
 +
|sipp=Yes
 +
|att=No
 +
|ipt=Yes
 +
|tsx=Yes
 +
|txt=Yes
 +
|ht=No
 +
|vpro=Yes
 +
|vtx=Yes
 +
|vtd=Yes
 +
|ept=Yes
 +
|mpx=Yes
 +
|sgx=Yes
 +
|securekey=Yes
 +
|osguard=Yes
 +
|intqat=No
 +
|dlboost=No
 +
|3dnow=No
 +
|e3dnow=No
 +
|smartmp=No
 +
|powernow=No
 +
|amdvi=No
 +
|amdv=No
 +
|amdsme=No
 +
|amdtsme=No
 +
|amdsev=No
 +
|rvi=No
 +
|smt=No
 +
|sensemi=No
 +
|xfr=No
 +
|xfr2=No
 +
|mxfr=No
 +
|amdpb=No
 +
|amdpb2=No
 +
|amdpbod=No
 
}}
 
}}

Latest revision as of 17:24, 27 July 2019

Edit Values
Core i5-9500
coffee lake s (front).png
General Info
DesignerIntel
ManufacturerIntel
Model Numberi5-9500
Part NumberCM8068403362610
S-SpecSRF4B
MarketDesktop
IntroductionApril 23, 2019 (announced)
April 23, 2019 (launched)
Release Price$192.00 (tray)
$202.00 (box)
ShopAmazon
General Specs
FamilyCore i5
Seriesi5-9000
LockedYes
Frequency3,000 MHz
Turbo Frequency4,400 MHz (1 core)
Bus typeDMI 3.0
Bus rate4 × 8 GT/s
Clock multiplier30
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureCoffee Lake
PlatformCoffee Lake
ChipsetCannon Point
Core NameCoffee Lake R
Core Family6
Core Model158
Core SteppingU0
Process14 nm
TechnologyCMOS
Die149 mm²
Word Size64 bit
Cores6
Threads6
Max Memory128 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP65 W
Tjunction0 °C – 100 °C
Packaging
PackageFCLGA-1151 (LGA)
FC-LGA14C		FCLGA-1151.svg
Dimension37.5 mm x 37.5 mm x 4.4 mm
Pitch0.914 mm
Contacts1151
SocketLGA-1151

Core i5-9500 is a 64-bit hexa-core mid-range performance x86 desktop microprocessor introduced by Intel in early 2019. This processor, which is based on the Coffee Lake microarchitecture, is manufactured on Intel's 3rd generation enhanced 14nm++ process. The i5-9500 operates at a 3 GHz with a TDP of 65 W and a Turbo Boost frequency of up to 4.4 GHz. This chip supports up to 128 GiB of dual-channel DDR4-2666 memory and incorporates Intel's UHD Graphics 630 IGP operating at 350 MHz with a burst frequency of 1.1 GHz.


Cache[edit]

Main article: Coffee Lake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$384 KiB
393,216 B
0.375 MiB
L1I$192 KiB
196,608 B
0.188 MiB
6x32 KiB8-way set associative 
L1D$192 KiB
196,608 B
0.188 MiB
6x32 KiB8-way set associativewrite-back
L2$1.5 MiB
1,536 KiB
1,572,864 B
0.00146 GiB
  6x256 KiB4-way set associativewrite-back
L3$9 MiB
9,216 KiB
9,437,184 B
0.00879 GiB
  6x1.5 MiB12-way set associativewrite-back

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2666
Supports ECCNo
Max Mem128 GiB
Controllers1
Channels2
Max Bandwidth39.74 GiB/s
40,693.76 MiB/s
42.671 GB/s
42,670.5 MB/s
0.0388 TiB/s
0.0427 TB/s
Bandwidth
Single 19.87 GiB/s
Double 39.74 GiB/s

Expansions[edit]

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 16
Configuration: 1x16, 2x8, 1x8+2x4


Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUUHD Graphics 630
DesignerIntelDevice ID0x3E92
Execution Units24Max Displays3
Max Memory64 GiB
65,536 MiB
67,108,864 KiB
68,719,476,736 B
Frequency350 MHz
0.35 GHz
350,000 KHz
Burst Frequency1,100 MHz
1.1 GHz
1,100,000 KHz
OutputDP, eDP, HDMI, DVI
Max Resolution
HDMI4096x2304 @24 Hz
DP4096x2304 @60 Hz
eDP4096x2304 @60 Hz
Standards
DirectX12
OpenGL4.5
OpenCL2.0
DP1.2
eDP1.4
HDMI1.4a
Additional Features
Intel Quick Sync Video
Intel InTru 3D
Intel Clear Video
Intel Clear Video HD

Features[edit]

[Edit/Modify Supported Features]

Cog-icon-grey.svg
Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
TXTTrusted Execution Technology (SMX)
vProIntel vPro
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
SIPPStable Image Platform Program
IPTIdentity Protection Technology
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i5/i5-9500&oldid=92505"
Facts about "Core i5-9500 - Intel"
RDF feed
l1$ size512 KiB (524,288 B, 0.5 MiB) +
l1d$ description8-way set associative +
l1d$ size256 KiB (262,144 B, 0.25 MiB) +
l1i$ description8-way set associative +
l1i$ size256 KiB (262,144 B, 0.25 MiB) +
l2$ description4-way set associative +
l2$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
l3$ description16-way set associative +
l3$ size12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) +