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Difference between revisions of "intel/xeon w/w-2102"
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{{intel title|Xeon W-2102}} | {{intel title|Xeon W-2102}} | ||
− | {{ | + | {{chip |
|future=Yes | |future=Yes | ||
|name=Xeon W-2102 | |name=Xeon W-2102 | ||
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|part number=CD8067303532802 | |part number=CD8067303532802 | ||
|s-spec=SR3LG | |s-spec=SR3LG | ||
+ | |s-spec qs=QMW2 | ||
|market=Workstation | |market=Workstation | ||
|first announced=August 29, 2017 | |first announced=August 29, 2017 | ||
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|isa family=x86 | |isa family=x86 | ||
|microarch=Skylake (server) | |microarch=Skylake (server) | ||
− | |platform= | + | |platform=Basin Falls |
|core name=Skylake W | |core name=Skylake W | ||
|core family=6 | |core family=6 | ||
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|max memory=512 GiB | |max memory=512 GiB | ||
|tdp=120 W | |tdp=120 W | ||
− | |package | + | |tcase min=0 °C |
+ | |tcase max=66 °C | ||
+ | |package name 1=intel,fclga_2066 | ||
}} | }} | ||
'''W-2102''' is a {{arch|64}} [[quad-core]] [[x86]] enterprise performance workstation microprocessor introduced by [[Intel]] in [[2017]]. This processors, which is fabricated on an enhanced [[14 nm process|14nm+ process]] based on the {{intel|Skylake (server)|Skylake}} server microarchitecture, operates at 2.9 GHz with a [[TDP]] of 120 W and no {{intel|turbo boost}}. This chip supports up to 512 GiB of quad-channel DDR4-2400 ECC memory. | '''W-2102''' is a {{arch|64}} [[quad-core]] [[x86]] enterprise performance workstation microprocessor introduced by [[Intel]] in [[2017]]. This processors, which is fabricated on an enhanced [[14 nm process|14nm+ process]] based on the {{intel|Skylake (server)|Skylake}} server microarchitecture, operates at 2.9 GHz with a [[TDP]] of 120 W and no {{intel|turbo boost}}. This chip supports up to 512 GiB of quad-channel DDR4-2400 ECC memory. | ||
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|bandwidth qchan=71.53 GiB/s | |bandwidth qchan=71.53 GiB/s | ||
|pae=46 bit | |pae=46 bit | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions main | ||
+ | | | ||
+ | {{expansions entry | ||
+ | |type=PCIe | ||
+ | |pcie revision=3.0 | ||
+ | |pcie lanes=48 | ||
+ | |pcie config=x16 | ||
+ | |pcie config 2=x8 | ||
+ | |pcie config 3=x4 | ||
+ | }} | ||
+ | }} | ||
+ | |||
+ | == Features == | ||
+ | {{x86 features | ||
+ | |real=Yes | ||
+ | |protected=Yes | ||
+ | |smm=Yes | ||
+ | |fpu=Yes | ||
+ | |x8616=Yes | ||
+ | |x8632=Yes | ||
+ | |x8664=Yes | ||
+ | |nx=Yes | ||
+ | |mmx=Yes | ||
+ | |emmx=Yes | ||
+ | |sse=Yes | ||
+ | |sse2=Yes | ||
+ | |sse3=Yes | ||
+ | |ssse3=Yes | ||
+ | |sse41=Yes | ||
+ | |sse42=Yes | ||
+ | |sse4a=No | ||
+ | |avx=Yes | ||
+ | |avx2=Yes | ||
+ | |avx512f=Yes | ||
+ | |avx512cd=Yes | ||
+ | |avx512er=No | ||
+ | |avx512pf=No | ||
+ | |avx512bw=Yes | ||
+ | |avx512dq=Yes | ||
+ | |avx512vl=Yes | ||
+ | |avx512ifma=No | ||
+ | |avx512vbmi=No | ||
+ | |avx5124fmaps=No | ||
+ | |avx5124vnniw=No | ||
+ | |avx512vpopcntdq=No | ||
+ | |avx512units=1 | ||
+ | |abm=Yes | ||
+ | |tbm=No | ||
+ | |bmi1=Yes | ||
+ | |bmi2=Yes | ||
+ | |fma3=Yes | ||
+ | |fma4=No | ||
+ | |aes=Yes | ||
+ | |rdrand=Yes | ||
+ | |sha=No | ||
+ | |xop=No | ||
+ | |adx=Yes | ||
+ | |clmul=Yes | ||
+ | |f16c=Yes | ||
+ | |tbt1=No | ||
+ | |tbt2=No | ||
+ | |tbmt3=No | ||
+ | |bpt=No | ||
+ | |eist=Yes | ||
+ | |sst=Yes | ||
+ | |flex=No | ||
+ | |fastmem=No | ||
+ | |ivmd=Yes | ||
+ | |intelnodecontroller=No | ||
+ | |intelnode=No | ||
+ | |kpt=No | ||
+ | |ptt=No | ||
+ | |intelrunsure=No | ||
+ | |mbe=No | ||
+ | |isrt=No | ||
+ | |sba=No | ||
+ | |mwt=No | ||
+ | |sipp=No | ||
+ | |att=No | ||
+ | |ipt=Yes | ||
+ | |tsx=Yes | ||
+ | |txt=Yes | ||
+ | |ht=No | ||
+ | |vpro=Yes | ||
+ | |vtx=Yes | ||
+ | |vtd=Yes | ||
+ | |ept=Yes | ||
+ | |mpx=Yes | ||
+ | |sgx=No | ||
+ | |securekey=Yes | ||
+ | |osguard=Yes | ||
+ | |intqat=No | ||
+ | |3dnow=No | ||
+ | |e3dnow=No | ||
+ | |smartmp=No | ||
+ | |powernow=No | ||
+ | |amdvi=No | ||
+ | |amdv=No | ||
+ | |amdsme=No | ||
+ | |amdtsme=No | ||
+ | |amdsev=No | ||
+ | |rvi=No | ||
+ | |smt=No | ||
+ | |sensemi=No | ||
+ | |xfr=No | ||
}} | }} |
Latest revision as of 10:34, 24 October 2018
Edit Values | |
Xeon W-2102 | |
![]() | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | W-2102 |
Part Number | CD8067303532802 |
S-Spec | SR3LG QMW2 (QS) |
Market | Workstation |
Introduction | August 29, 2017 (announced) August 29, 2017 (launched) |
Release Price | $202.00 |
Shop | Amazon |
General Specs | |
Family | Xeon W |
Series | W-2000 |
Locked | Yes |
Frequency | 2,900 MHz |
Bus type | DMI 3.0 |
Bus rate | 4 × 8 GT/s |
Clock multiplier | 29 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Skylake (server) |
Platform | Basin Falls |
Core Name | Skylake W |
Core Family | 6 |
Core Stepping | U0 |
Process | 14 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 4 |
Threads | 4 |
Max Memory | 512 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 120 W |
Tcase | 0 °C – 66 °C |
Packaging | |
Package | FCLGA-2066 (LGA) |
Dimension | 52.5 mm × 45 mm |
Pitch | 1.016 mm |
Contacts | 2066 |
Socket | Socket R4 |
W-2102 is a 64-bit quad-core x86 enterprise performance workstation microprocessor introduced by Intel in 2017. This processors, which is fabricated on an enhanced 14nm+ process based on the Skylake server microarchitecture, operates at 2.9 GHz with a TDP of 120 W and no turbo boost. This chip supports up to 512 GiB of quad-channel DDR4-2400 ECC memory.
Contents
Cache[edit]
- Main article: Skylake § Cache
Note that while this is a quad-core part, the L3 cache size is that of a hexa-core part.
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
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Integrated Memory Controller
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Expansions[edit]
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Expansion Options |
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Features[edit]
[Edit/Modify Supported Features]
Facts about "Xeon W-2102 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon W-2102 - Intel#pcie + |
base frequency | 2,900 MHz (2.9 GHz, 2,900,000 kHz) + |
bus links | 4 + |
bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
bus type | DMI 3.0 + |
clock multiplier | 29 + |
core count | 4 + |
core family | 6 + |
core name | Skylake W + |
core stepping | U0 + |
designer | Intel + |
family | Xeon W + |
first announced | August 29, 2017 + |
first launched | August 29, 2017 + |
full page name | intel/xeon w/w-2102 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has advanced vector extensions 512 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Secure Key Technology +, OS Guard + and Identity Protection Technology + |
has intel enhanced speedstep technology | true + |
has intel identity protection technology support | true + |
has intel secure key technology | true + |
has intel speed shift technology | true + |
has intel supervisor mode execution protection | true + |
has intel trusted execution technology | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 8.25 MiB (8,448 KiB, 8,650,752 B, 0.00806 GiB) + |
ldate | 3000 + |
main image | ![]() |
manufacturer | Intel + |
market segment | Workstation + |
max case temperature | 339.15 K (66 °C, 150.8 °F, 610.47 °R) + |
max cpu count | 1 + |
max memory | 524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) + |
max memory bandwidth | 71.53 GiB/s (73,246.72 MiB/s, 76.805 GB/s, 76,804.753 MB/s, 0.0699 TiB/s, 0.0768 TB/s) + |
max memory channels | 4 + |
microarchitecture | Skylake (server) + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | W-2102 + |
name | Xeon W-2102 + |
number of avx-512 execution units | 1 + |
package | FCLGA-2066 + |
part number | CD8067303532802 + |
platform | Basin Falls + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 202.00 (€ 181.80, £ 163.62, ¥ 20,872.66) + |
s-spec | SR3LG + |
s-spec (qs) | QMW2 + |
series | W-2000 + |
smp max ways | 1 + |
socket | Socket R4 + |
supported memory type | DDR4-2400 + |
tdp | 120 W (120,000 mW, 0.161 hp, 0.12 kW) + |
technology | CMOS + |
thread count | 4 + |
word size | 64 bit (8 octets, 16 nibbles) + |
x86/has memory protection extensions | true + |