(Description of pins 13-16 were incorrectly described as CM-ROM outputs, instead of CM-RAM.) |
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{{intel title|4004}} | {{intel title|4004}} | ||
− | {{ | + | {{chip |
− | | name | + | |name=4004 |
− | | image | + | |image=intel 4004 chip.jpg |
− | + | |caption=4004 in CerDIP | |
− | | caption | + | |designer=Intel |
− | | designer | + | |manufacturer=Intel |
− | | manufacturer | + | |model number=4004 |
− | | model number | + | |part number=C4004 |
− | | part number | + | |part number 2=D4004 |
− | | part number | + | |part number 3=P4004 |
− | | part number | + | |market=Commercial |
− | + | |market 2=Industrial | |
− | | market | + | |first announced=November 15, 1971 |
− | | market 2 | + | |first launched=December, 1971 |
− | | first announced | + | |last order=1982 |
− | | first launched | + | |family=MCS-4 |
− | | last order | + | |series=MCS |
− | + | |frequency=500 kHz | |
− | + | |frequency 2=740 kHz | |
− | + | |isa=4004 | |
− | | family | + | |isa family=4004 |
− | | series | + | |microarch=4004 |
− | | frequency | + | |chipset=4001 |
− | | frequency 2 | + | |chipset 2=4002 |
− | + | |chipset 3=4003 | |
− | | isa | + | |process=10 µm |
− | | isa | + | |transistors=2,250 |
− | | microarch | + | |technology=pMOS |
− | | chipset | + | |die area=12 mm² |
− | | chipset 2 | + | |die length=4 mm |
− | | chipset 3 | + | |die width=3 mm |
− | | process | + | |word size=4 bit |
− | | transistors | + | |core count=1 |
− | | technology | + | |thread count=1 |
− | | die area | + | |max memory addr=4 kB |
− | | die | + | |power=1 W |
− | | die | + | |v core=15 V |
− | | word size | + | |v core tolerance=5% |
− | | core count | + | |tstorage min=-55 °C |
− | | thread count | + | |tstorage max=125 °C |
− | + | |tambient min=0 °C | |
− | + | |tambient max=70 °C | |
− | | max memory addr | + | |packaging=Yes |
− | + | |package 0=CerDIP-16 | |
− | + | |package 0 type=CerDIP | |
− | | power | + | |package 0 pins=16 |
− | + | |package 0 pitch=2.54 mm | |
− | + | |package 0 width=18.7 mm | |
− | | v core | + | |package 0 length=7.5 mm |
− | | v core tolerance | + | |package 0 height=5.1 mm |
− | + | |package 1=DIP-16 | |
− | + | |package 1 type=DIP | |
− | + | |package 1 pins=16 | |
− | + | |package 1 pitch=2.3 mm | |
− | | tstorage min | + | |package 1 width=18.9 mm |
− | | tstorage max | + | |package 1 length=6.2 mm |
− | | tambient min | + | |package 1 height=5.1 mm |
− | | tambient max | ||
− | |||
− | | packaging | ||
− | | package 0 | ||
− | | package 0 type | ||
− | | package 0 pins | ||
− | | package 0 pitch | ||
− | | package 0 width | ||
− | | package 0 length | ||
− | | package 0 height | ||
− | | package 1 | ||
− | | package 1 type | ||
− | | package 1 pins | ||
− | | package 1 pitch | ||
− | | package 1 width | ||
− | | package 1 length | ||
− | | package 1 height | ||
}} | }} | ||
− | The '''Intel 4004''' was released by [[Intel Corporation]] in [[1971]] and was the first commercially available [[microprocessor]]. The 4004 was a [[4-bit architecture|4-bit CPU]], designed for use in the [[Busicom]] 141-PF printing calculator<ref>[http://www.intel.com/content/www/us/en/history/museum-story-of-intel-4004.html The Story of the Intel® 4004]</ref>. The chip, which is clocked at 740 KHz, employs a 10µm<ref>[http://www.intel.com/Assets/PDF/DataSheet/4004_datasheet.pdf 4004 Datasheet]</ref> process silicon-gate, capable of executing 92,000 instructions per second. The chip was capable of accessing 4KB of [[program memory]] and 640 bytes of RAM. The 4004 was part of the [[Intel MCS-4]] system. | + | The '''Intel 4004''' was released by [[Intel Corporation]] in [[1971]] and was the first commercially available [[microprocessor]]. The 4004 was a [[4-bit architecture|4-bit CPU]], designed for use in the [[Busicom]] 141-PF printing calculator<ref>[http://www.intel.com/content/www/us/en/history/museum-story-of-intel-4004.html The Story of the Intel® 4004]</ref>. The chip, which is clocked at 740 KHz, employs a 10µm<ref>[https://web.archive.org/web/20131101060923/http://www.intel.com/Assets/PDF/DataSheet/4004_datasheet.pdf 4004 Datasheet]</ref> process silicon-gate, capable of executing 92,000 instructions per second. The chip was capable of accessing 4KB of [[program memory]] and 640 bytes of RAM. The 4004 was part of the [[Intel MCS-4]] system. |
The microprocessor had a limited architecture, such as: only a 3-levels deep [[stack]], a complex memory access scheme, and no [[interrupt]] support. In [[1974]] Intel released an enhanced version of the chip called the [[Intel 4040|4040]]. | The microprocessor had a limited architecture, such as: only a 3-levels deep [[stack]], a complex memory access scheme, and no [[interrupt]] support. In [[1974]] Intel released an enhanced version of the chip called the [[Intel 4040|4040]]. | ||
Line 83: | Line 66: | ||
Three primary source variations were produced by Intel: C4004, D4004 and the P4004. The ''Intel C4004'' was the first chip to be manufactured; it had the gray traces visible on the white ceramic package itself. The C4004 was produced up until mid 1976, when production for the ''Intel D4004'' began. The D4004 had a plastic, black ceramic package. The ''Intel P4004'' is the plastic packaging version. | Three primary source variations were produced by Intel: C4004, D4004 and the P4004. The ''Intel C4004'' was the first chip to be manufactured; it had the gray traces visible on the white ceramic package itself. The C4004 was produced up until mid 1976, when production for the ''Intel D4004'' began. The D4004 had a plastic, black ceramic package. The ''Intel P4004'' is the plastic packaging version. | ||
− | A couple secondary sources exists, which has been developed by National Semiconductor and Hitachi since mid-1975. National Semiconductor produced two versions: ''INS4004J'' and ''INS4004D''. The ''INS4004J'' is a 16-pin black, ceramic DIP, while the ''INS4004D'' version is a 16-pin side-brazed, ceramic DIP. The other source was the {{hitachi|HD35404}} made by [[Hitachi]]. A third source was [[Microsystems International]] which actually manufactured an enhanced version of the chip since mid 1970 (also introduced in 1971). | + | A couple of secondary sources exists, which has been developed by National Semiconductor and Hitachi since mid-1975. National Semiconductor produced two versions: ''INS4004J'' and ''INS4004D''. The ''INS4004J'' is a 16-pin black, ceramic DIP, while the ''INS4004D'' version is a 16-pin side-brazed, ceramic DIP. The other source was the {{hitachi|HD35404}} made by [[Hitachi]]. A third source was [[Microsystems International]] which actually manufactured an enhanced version of the chip since mid 1970 (also introduced in 1971). |
{| class="wikitable" | {| class="wikitable" | ||
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| 7 || Clock Phase 2 | | 7 || Clock Phase 2 | ||
|- | |- | ||
− | | 8 || Sync || ROM & RAM Sync || Synchronizes the ROM and RAM by signaling the clock is on the | + | | 8 || Sync || ROM & RAM Sync || Synchronizes the ROM and RAM by signaling the clock is on the rising edge. |
|- | |- | ||
| 9 || Reset || Reset flag || A logic 1 clears all processor status registers and forces the program counter to jump to address 0x0. The RESET signal must be on for at least 64 clock cycles in order to take effect. | | 9 || Reset || Reset flag || A logic 1 clears all processor status registers and forces the program counter to jump to address 0x0. The RESET signal must be on for at least 64 clock cycles in order to take effect. | ||
Line 139: | Line 122: | ||
| 12 || V<sub>DD</sub> || V<sub>SS</sub> -15±5% || | | 12 || V<sub>DD</sub> || V<sub>SS</sub> -15±5% || | ||
|- | |- | ||
− | | 13 || CM-RAM<sub>3</sub> || rowspan="4" | CM- | + | | 13 || CM-RAM<sub>3</sub> || rowspan="4" | CM-RAM outputs || rowspan="4" | Bank selection signal for the [[Intel 4002|4002 RAM]] chips in the system. |
|- | |- | ||
| 14 || CM-RAM<sub>2</sub> | | 14 || CM-RAM<sub>2</sub> |
Latest revision as of 20:37, 21 November 2021
Edit Values | |
4004 | |
4004 in CerDIP | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | 4004 |
Part Number | C4004, D4004, P4004 |
Market | Commercial, Industrial |
Introduction | November 15, 1971 (announced) December, 1971 (launched) |
End-of-life | 1982 (last order) |
Shop | Amazon |
General Specs | |
Family | MCS-4 |
Series | MCS |
Frequency | 500 kHz, 740 kHz |
Microarchitecture | |
ISA | 4004 (4004) |
Microarchitecture | 4004 |
Chipset | 4001, 4002, 4003 |
Process | 10 µm |
Transistors | 2,250 |
Technology | pMOS |
Die | 12 mm² 4 mm × 3 mm |
Word Size | 4 bit |
Cores | 1 |
Threads | 1 |
Max Address Mem | 4 kB |
Electrical | |
Power dissipation | 1 W |
Vcore | 15 V ± 5% |
Tstorage | -55 °C – 125 °C |
Tambient | 0 °C – 70 °C |
The Intel 4004 was released by Intel Corporation in 1971 and was the first commercially available microprocessor. The 4004 was a 4-bit CPU, designed for use in the Busicom 141-PF printing calculator[1]. The chip, which is clocked at 740 KHz, employs a 10µm[2] process silicon-gate, capable of executing 92,000 instructions per second. The chip was capable of accessing 4KB of program memory and 640 bytes of RAM. The 4004 was part of the Intel MCS-4 system.
The microprocessor had a limited architecture, such as: only a 3-levels deep stack, a complex memory access scheme, and no interrupt support. In 1974 Intel released an enhanced version of the chip called the 4040.
Variations[edit]
Three primary source variations were produced by Intel: C4004, D4004 and the P4004. The Intel C4004 was the first chip to be manufactured; it had the gray traces visible on the white ceramic package itself. The C4004 was produced up until mid 1976, when production for the Intel D4004 began. The D4004 had a plastic, black ceramic package. The Intel P4004 is the plastic packaging version.
A couple of secondary sources exists, which has been developed by National Semiconductor and Hitachi since mid-1975. National Semiconductor produced two versions: INS4004J and INS4004D. The INS4004J is a 16-pin black, ceramic DIP, while the INS4004D version is a 16-pin side-brazed, ceramic DIP. The other source was the HD35404 made by Hitachi. A third source was Microsystems International which actually manufactured an enhanced version of the chip since mid 1970 (also introduced in 1971).
Manufacturer | Model | Package |
---|---|---|
Intel | C4004 | 16-pin Ceramic DIP |
Intel | D4004 | 16-pin Ceramic DIP |
Intel | P4004 | 16-pin Plastic DIP |
National Semiconductor | INS4004D | 16-pin Ceramic DIP |
National Semiconductor | INS4004J | 16-pin side-brazed Ceramic DIP |
Hitachi | HD35404 | 16-pin DIP |
Microsystems International | MF7114 | ? |
Pinout[edit]
The 4004 has 16 pins that are used for i/o, memory controller, clock phases, power and reset.
Pin # | Pin Name | Purpose | Explanation |
---|---|---|---|
1 | D0 | Bidirectional data bus pins | Address and data communication to the ROM and RAM occurs on D0-D3. |
2 | D1 | ||
3 | D2 | ||
4 | D3 | ||
5 | Vss | Main Supply | |
6 | Clock Phase 1 | Clock inputs | |
7 | Clock Phase 2 | ||
8 | Sync | ROM & RAM Sync | Synchronizes the ROM and RAM by signaling the clock is on the rising edge. |
9 | Reset | Reset flag | A logic 1 clears all processor status registers and forces the program counter to jump to address 0x0. The RESET signal must be on for at least 64 clock cycles in order to take effect. |
10 | Test | Test logic state | Signal can be tested via the JCN instruction.
|
11 | CM-ROM | CM-ROM output | ROM selection signal used to retrieve data from memory. |
12 | VDD | VSS -15±5% | |
13 | CM-RAM3 | CM-RAM outputs | Bank selection signal for the 4002 RAM chips in the system. |
14 | CM-RAM2 | ||
15 | CM-RAM1 | ||
16 | CM-RAM0 |
Designers[edit]
Lead designers for the 4004 are:
- Ted Hoff
- Federico Faggin
- Stan Mazor
- Masatoshi Shim
Die Shot[edit]
- 10 µm process
- pMOS transistors
- 2,250 transistors
- 12 mm² die
References[edit]
base frequency | 0.5 MHz (5.0e-4 GHz, 500 kHz) + and 0.74 MHz (7.4e-4 GHz, 740 kHz) + |
chipset | 4001 +, 4002 + and 4003 + |
core count | 1 + |
core voltage | 15 V (150 dV, 1,500 cV, 15,000 mV) + |
core voltage tolerance | 5% + |
designer | Intel +, Ted Hoff +, Federico Faggin +, Stan Mazor + and Masatoshi Shim + |
die area | 12 mm² (0.0186 in², 0.12 cm², 12,000,000 µm²) + |
die length | 4 mm (0.4 cm, 0.157 in, 4,000 µm) + |
die width | 3 mm (0.3 cm, 0.118 in, 3,000 µm) + |
family | MCS-4 + |
first announced | November 15, 1971 + |
first launched | December 1971 + |
full page name | intel/mcs-4/4004 + |
instance of | microprocessor + |
isa | 4004 + |
isa family | 4004 + |
last order | 1982 + |
ldate | December 1971 + |
main image | + |
main image caption | 4004 in CerDIP + |
manufacturer | Intel + |
market segment | Commercial + and Industrial + |
max ambient temperature | 343.15 K (70 °C, 158 °F, 617.67 °R) + |
max memory address | 4 kB + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | 4004 + |
min ambient temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 218.15 K (-55 °C, -67 °F, 392.67 °R) + |
model number | 4004 + |
name | 4004 + |
part number | C4004 +, D4004 + and P4004 + |
power dissipation | 1 W (1,000 mW, 0.00134 hp, 0.001 kW) + |
process | 10,000 nm (10 μm, 0.01 mm) + |
series | MCS + |
technology | pMOS + |
thread count | 1 + |
transistor count | 2,250 + |
word size | 4 bit (0.5 octets, 1 nibbles) + |