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Difference between revisions of "zhaoxin/microarchitectures/lujiazui"
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(Key changes from {{\\|WuDaoKou}})
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=== Key changes from {{\\|WuDaoKou}} ===
 
=== Key changes from {{\\|WuDaoKou}} ===
 
* [[16 nm|16 nm FinFET]] (from [[28 nm]])
 
* [[16 nm|16 nm FinFET]] (from [[28 nm]])
 +
* 1.5x performance ([[SPEC CPU2006]] Int)
 
* Higher clock speed
 
* Higher clock speed
 
* Improved memory controller
 
* Improved memory controller
 
** Support for DDR4 2800 MT/s and 3200 MT/s (from 2400 MT/s)
 
** Support for DDR4 2800 MT/s and 3200 MT/s (from 2400 MT/s)
 
{{expand list}}
 
{{expand list}}

Revision as of 16:15, 2 February 2018

Edit Values
LuJiaZui µarch
General Info
Arch TypeCPU
DesignerZhaoxin
ManufacturerTSMC
Introduction2019
Process16 nm
Core Configs2, 4, 8
Pipeline
TypeSuperscalar
OoOEYes
SpeculativeYes
Reg RenamingYes
Instructions
ISAx86-64
Succession

LuJiaZui is the successor to WuDaoKou, a 16 nm x86 microarchitecture designed by Zhaoxin for mainstream laptops, desktops, and servers.

Etymology

As with prior microarchitectures, LuJiaZui is named after the Lujiazui station of the Shanghai Metro. The station is located in the highly prosperous Pudong district of Shanghai.

Brands

zhaoxin roadmap (2017).png
Family Series Description
KaiXian KX (6000) Desktop, Laptops
Kaisheng KH (30000) Storage, Servers

Process Technology

Lujiazui is manufactured on TSMC's 16 nm FinFET process.

Architecture

Key changes from WuDaoKou

  • 16 nm FinFET (from 28 nm)
  • 1.5x performance (SPEC CPU2006 Int)
  • Higher clock speed
  • Improved memory controller
    • Support for DDR4 2800 MT/s and 3200 MT/s (from 2400 MT/s)

This list is incomplete; you can help by expanding it.

codenameLuJiaZui +
core count2 +, 4 + and 8 +
designerZhaoxin +
first launched2019 +
full page namezhaoxin/microarchitectures/lujiazui +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerTSMC +
microarchitecture typeCPU +
nameLuJiaZui +
process16 nm (0.016 μm, 1.6e-5 mm) +