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Difference between revisions of "arm holdings"
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| + | * {{armh|ARM10E|l=arch}} | ||
| + | * {{armh|ARM11|l=arch}} | ||
* {{armh|ARM1|l=arch}} | * {{armh|ARM1|l=arch}} | ||
| + | * {{armh|ARM250|l=arch}} | ||
* {{armh|ARM2|l=arch}} | * {{armh|ARM2|l=arch}} | ||
| − | |||
* {{armh|ARM3|l=arch}} | * {{armh|ARM3|l=arch}} | ||
* {{armh|ARM6|l=arch}} | * {{armh|ARM6|l=arch}} | ||
| + | * {{armh|ARM7EJ|l=arch}} | ||
* {{armh|ARM7|l=arch}} | * {{armh|ARM7|l=arch}} | ||
* {{armh|ARM7TDMI|l=arch}} | * {{armh|ARM7TDMI|l=arch}} | ||
| − | * {{armh| | + | * {{armh|ARM9E|l=arch}} |
* {{armh|ARM9TDMI|l=arch}} | * {{armh|ARM9TDMI|l=arch}} | ||
| − | * {{armh| | + | * {{armh|Cortex-A12|l=arch}} |
| − | * {{armh| | + | * {{armh|Cortex-A15|l=arch}} |
| − | * {{armh| | + | * {{armh|Cortex-A17|l=arch}} |
| − | * {{armh| | + | * {{armh|Cortex-A32|l=arch}} |
| − | * {{armh| | + | * {{armh|Cortex-A35|l=arch}} |
| − | * {{armh| | + | * {{armh|Cortex-A53|l=arch}} |
| + | * {{armh|Cortex-A55|l=arch}} | ||
| + | * {{armh|Cortex-A57|l=arch}} | ||
| + | * {{armh|Cortex-A5|l=arch}} | ||
| + | * {{armh|Cortex-A72|l=arch}} | ||
| + | * {{armh|Cortex-A73|l=arch}} | ||
| + | * {{armh|Cortex-A75|l=arch}} | ||
| + | * {{armh|Cortex-A7|l=arch}} | ||
| + | * {{armh|Cortex-A8|l=arch}} | ||
| + | * {{armh|Cortex-A9|l=arch}} | ||
* {{armh|Cortex-M0|l=arch}} | * {{armh|Cortex-M0|l=arch}} | ||
* {{armh|Cortex-M0+|l=arch}} | * {{armh|Cortex-M0+|l=arch}} | ||
| Line 56: | Line 68: | ||
* {{armh|Cortex-M7|l=arch}} | * {{armh|Cortex-M7|l=arch}} | ||
* {{armh|Cortex-R4|l=arch}} | * {{armh|Cortex-R4|l=arch}} | ||
| + | * {{armh|Cortex-R52|l=arch}} | ||
* {{armh|Cortex-R5|l=arch}} | * {{armh|Cortex-R5|l=arch}} | ||
| − | |||
* {{armh|Cortex-R7|l=arch}} | * {{armh|Cortex-R7|l=arch}} | ||
* {{armh|Cortex-R8|l=arch}} | * {{armh|Cortex-R8|l=arch}} | ||
| − | * {{armh| | + | * {{armh|SecurCore SC000|l=arch}} |
| − | * {{armh| | + | * {{armh|SecurCore SC100|l=arch}} |
| − | * {{armh| | + | * {{armh|SecurCore SC300|l=arch}} |
| − | |||
| − | |||
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}} | }} | ||
Revision as of 04:29, 29 May 2017
| ARM Holdings | |
| |
| Type | Public |
| Founded | November 27, 1990 |
| Founder | Jamie Urquhart Mike Muller Tudor Brown Lee Smith John Biggs Harry Oldham Dave Howard Pete Harrod Harry Meekings Al Thomas Andy Merritt |
| Headquarters | Cambridge, England |
| Website | http://www.arm.com |
ARM Holdings, usually simply ARM, is a British multinational semiconductor and software design company.
Microarchitectures
- ARM10E
- ARM11
- ARM1
- ARM250
- ARM2
- ARM3
- ARM6
- ARM7EJ
- ARM7
- ARM7TDMI
- ARM9E
- ARM9TDMI
- Cortex-A12
- Cortex-A15
- Cortex-A17
- Cortex-A32
- Cortex-A35
- Cortex-A53
- Cortex-A55
- Cortex-A57
- Cortex-A5
- Cortex-A72
- Cortex-A73
- Cortex-A75
- Cortex-A7
- Cortex-A8
- Cortex-A9
- Cortex-M0
- Cortex-M0+
- Cortex-M1
- Cortex-M3
- Cortex-M4
- Cortex-M7
- Cortex-R4
- Cortex-R52
- Cortex-R5
- Cortex-R7
- Cortex-R8
- SecurCore SC000
- SecurCore SC100
- SecurCore SC300
- ARM4 & ARM5 would've been during the time Acorn was spun off as ARM Holdings. The two versions were skipped.
ISAs
See Also
Facts about "ARM Holdings"
| company type | public + |
| founded | November 27, 1990 + |
| founder | Jamie Urquhart +, Mike Muller +, Tudor Brown +, Lee Smith +, John Biggs +, Harry Oldham +, Dave Howard +, Pete Harrod +, Harry Meekings +, Al Thomas + and Andy Merritt + |
| full page name | arm holdings + |
| headquarters | Cambridge, England + |
| instance of | semiconductor company + |
| name | ARM Holdings + |
| website | http://www.arm.com + |
| wikidata id | Q296782 + |