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Date | Name | Thumbnail | Size | User | Description | Versions |
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19:53, 16 May 2017 | amd zen2-3 roadmap.png (file) | 541 KB | Inject | AMD {{amd|Zen 2}} and {{amd|Zen 3}} roadmap | 1 | |
19:57, 16 May 2017 | ryzen threadripper.png (file) | 425 KB | Inject | AMD {{amd|Ryzen}} ThreadRipper | 1 | |
01:11, 17 May 2017 | lisa announces epyc.png (file) | 202 KB | Inject | AMD's CEO Lisa Su announces the {{amd|EPYC}} server processor family. Taken from AMD's investor's day stream. | 1 | |
01:31, 17 May 2017 | amd naples mcp.png (file) | 77 KB | Inject | AMD {{amd|Naples|l=core}} MCP from AMD's Investor meeting | 1 | |
01:35, 17 May 2017 | naples without heatspread.jpg (file) | 44 KB | Inject | AMD's VP Forrest Norrod showing the 32-core Naples chip with the 4x Zepplines dies on a multi-chip package with the heat spreader off. | 1 | |
11:25, 18 May 2017 | ibm power9-11 roadmap.png (file) | 860 KB | At32Hz | IBM {{ibm|POWER9|l=arch}} through {{ibm|POWER11|l=arch}} roadmap. | 1 | |
11:42, 18 May 2017 | power8 die shot (12-core).png (file) | 10.33 MB | At32Hz | IBM {{ibm|POWER8|l=arch}} 12 cores die shot by IBM. | 1 | |
14:56, 18 May 2017 | power8 die shot (12-core)(annotated).png (file) | 7.82 MB | At32Hz | Annotated version by WikiChip of the IBM {{ibm|POWER8|l=arch}} 12 cores die shot by IBM. * Original version: File:power8 die shot (12-core).png | 1 | |
15:57, 18 May 2017 | power8 die shot (6-core)(annotated).png (file) | 1.09 MB | At32Hz | Annotated IBM {{ibm|POWER8|l=arch}} 6 cores die shot by IBM. | 1 | |
07:04, 27 May 2017 | fairchild 100k ad.pdf (file) | 590 KB | ChipIt | {{fairchild|100K}} ad | 1 | |
08:04, 27 May 2017 | skylake decode.svg (file) | 28 KB | At32Hz | should be 5 not 6 paths | 6 | |
12:58, 28 May 2017 | armada 610 block.png (file) | 213 KB | David | {{marvell|ARMADA 600|ARMADA}} 610 block diagram | 1 | |
13:01, 28 May 2017 | armada610 pb.pdf (file) | 407 KB | David | ARMADA 610 product brief | 1 | |
13:05, 28 May 2017 | armada610overview.pdf (file) | 263 KB | David | ARMADA 610 Overview | 1 | |
14:39, 28 May 2017 | armada618 pb.pdf (file) | 404 KB | David | Marvell {{marvell|ARMADA}} 618 | 1 | |
14:43, 28 May 2017 | armada 618 block.png (file) | 308 KB | David | {{marvell|ARMADA}} 618 block diagram | 1 | |
15:41, 28 May 2017 | armada 628.png (file) | 700 KB | David | {{marvel|ARMADA}} 628, image by Marvell. | 1 | |
12:49, 29 May 2017 | dec logo.svg (file) | 7 KB | David | dec logo | 1 | |
20:04, 29 May 2017 | strongarm die shot.png (file) | 1.83 MB | David | DEC {{decc|StrongARM|l=arch}} die shot by DEC. Copyright DEC, 1996. | 1 | |
16:22, 31 May 2017 | skylake x (back).png (file) | 19.8 MB | At32Hz | corrected image | 2 | |
16:25, 31 May 2017 | kaby lake x (back).png (file) | 12 MB | At32Hz | Intel {{intel|Kaby Lake X|l=core}} Core chip, back. Image by Intel. | 1 | |
16:37, 31 May 2017 | skylake x (front).png (file) | 9.27 MB | At32Hz | Intel uploaded higher res | 2 | |
16:38, 31 May 2017 | kaby lake x (front).png (file) | 6.36 MB | At32Hz | Intel {{intel|Kaby Lake X|l=core}} Core chip, front. Image by Intel. | 1 | |
11:30, 1 June 2017 | tbmt software.jpg (file) | 32 KB | Inject | Intel's {{intel|Turbo Boost Max Technology}} software. Image by Intel. | 1 | |
15:48, 1 June 2017 | skylake x memory changes.png (file) | 561 KB | At32Hz | Intel {{intel|Skylake|l=arch}} X memory changes. Slide from Intel's computex 2017 presentation. | 1 | |
16:07, 1 June 2017 | Intel-Core-X-Series-Processor-Family Product-Information.pdf (file) | 15.1 MB | At32Hz | Intel {{intel|Core X}} processor family product info | 1 | |
21:15, 1 June 2017 | skylake dt (front).png (file) | 870 KB | At32Hz | Intel {{intel|Skylake-DT|l=core}} core. Image by Intel. | 1 | |
21:16, 1 June 2017 | skylake dt (back).png (file) | 52.99 MB | At32Hz | Intel {{intel|Skylake-DT|l=core}} core, back. Image by Intel. | 1 | |
14:26, 3 June 2017 | skylake y (front).png (file) | 4.02 MB | At32Hz | Front of {{intel|Skylake Y|l=core}} package by Intel Press. Copyright of Intel. | 1 | |
14:26, 3 June 2017 | skylake y (back).png (file) | 8.9 MB | At32Hz | Back of {{intel|Skylake Y|l=core}} package by Intel Press. Copyright of Intel. | 1 | |
15:48, 4 June 2017 | kaby lake h (back).png (file) | 47.04 MB | At32Hz | Intel {{intel|Kaby Lake H|l=core}} package, back. Image by Intel. | 2 | |
15:51, 4 June 2017 | skylake h (back).png (file) | 47.04 MB | At32Hz | Intel {{intel|Skylake H|l=core}} package, front. Image by Intel. | 1 | |
09:59, 5 June 2017 | ibm stacked silicon nanowire transistors.jpg (file) | 409 KB | At32Hz | Stacked silicon nanowire transistors. | 1 | |
21:39, 5 June 2017 | e3-1500 v5 (front).png (file) | 315 KB | At32Hz | Intel {{intel|Xeon E3}}-1500 v5, back. Image by Intel. | 1 | |
21:39, 5 June 2017 | e3-1500 v5 (back).png (file) | 478 KB | At32Hz | Intel {{intel|Xeon E3}}-1500 v5, back. Image by Intel. | 1 | |
15:09, 6 June 2017 | amdahl's law by sequential portion.png (file) | 202 KB | Inject | Amdahl's Law for 1 to 1024 cores based on percentage of sequential portion | 1 | |
02:38, 7 June 2017 | amdahl.svg (file) | 31 KB | ChipIt | 3 | ||
17:43, 8 June 2017 | skylake-sp memory.svg (file) | 11 KB | Inject | Intel {{intel|Skylake|l=arch}}-SP New memory hierarchy. | 1 | |
00:22, 9 June 2017 | alpha 21264 die shot.png (file) | 2.71 MB | David | {{decc|Alpha 21264|l=arch}} die shot by DEC from their own presentation slide that was used at a presentation at MIT, circa. ~1997. Copyright of DEC (now HP?) | 1 | |
00:40, 11 June 2017 | alpha processor inc logo.svg (file) | 1.83 MB | David | Alpha Processor, Inc (API) logo | 1 | |
00:00, 12 June 2017 | alpha 21364 die shot.png (file) | 1.28 MB | ChipIt | 1 | ||
00:54, 12 June 2017 | alpha 21364 die shot (annotated).png (file) | 1.24 MB | ChipIt | typo.. | 2 | |
02:05, 12 June 2017 | alpha 21364 core (annotated).png (file) | 650 KB | ChipIt | Missed BIU | 2 | |
02:08, 12 June 2017 | alpha 21364 core.png (file) | 726 KB | ChipIt | DEC/Compaq {{compaq|Alpha 21364|l=arch}} core. Original die shot by Compaq. | 1 | |
02:43, 12 June 2017 | ev7SMP.pdf (file) | 1.62 MB | ChipIt | * {{compaq|Alpha 21364|l=arch}}: A Scalable Single-chip SMP ** Peter Bannon ** Senior Consulting Engineer ** Compaq Computer Corporation ** Shrewsbury, MA * Original File: File:ev7SMP.ppt | 1 | |
02:43, 12 June 2017 | ev7SMP.ppt (file) | 319 KB | ChipIt | 1 | ||
02:44, 12 June 2017 | Alpha 21364 (EV7) (January 4, 2002).pdf (file) | 258 KB | ChipIt | {{compaq|Alpha 21364|l=arch}} (EV7) January 4, 2002 | 1 | |
03:50, 12 June 2017 | Alpha 21464 die floorplan.png (file) | 175 KB | ChipIt | {{compaq|Alpha 21464|l=arch}} die floorplan. Image by Compaq. | 1 | |
06:51, 13 June 2017 | alpha 21264 die shot (annotated).png (file) | 2.26 MB | ChipIt | WikiChip annotated version of the {{decc|Alpha 21264|l=arch}} die shot by DEC from their own presentation slide that was used at a presentation at MIT, circa. ~1997. Copyright of DEC (now HP?) * Original Version: [[:File:alpha 21264 die shot.... | 1 | |
13:12, 13 June 2017 | alpha 21164 die shot (annotated).png (file) | 14.08 MB | ChipIt | WikiChip annotated version of the die shot of DEC Alpha 21164 (EV5) microprocessor. Package markings are 21164-CA 333 and 21-40658-18 part number, and DEC chip number is DC275K. * Original Version: File:alpha_21164_die_shot.png | 1 |
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