...{{amd|Ryzen Threadripper}} high-end desktop processors. It was superseeded by {{\\|Socket sTRX4}}. Contemporary mainstream desktop processors use {{\\|So ...DA}} interface, and other client-oriented features which are not supported by the other infrastructures.

...PCIe I/O links. Socket SP3 succeeded {{\\|Socket G34}} and was superseded by {{\\|Socket SP5}}. |{{amd|CPUID#Family 23 (17h)|Family 17h}} Models 00h–0Fh

...ite techdoc|title=Processor Programming Reference (PPR) for AMD Family 19h Models 11h, Revision B1 Processors|url=https://www.amd.com/system/files/TechDocs/5 ...{{abbr|APML}}-I3C ({{abbr|SB-RMI}}, {{abbr|SB-TSI}}) for health monitoring by a {{abbr|BMC}}

...and {{\\|Socket AM2+|AM2+}} with a single HT link. Socket F was superseded by {{\\|Socket C32}} and {{\\|Socket G34|G34}} which support [[DDR3]] memory. ...of Family 10h can be configured for DDR2 and DDR3 DIMMs. Opteron DP and MP models with a DDR3 interface were released in a LGA-1207 package for {{\\|Socket C

...upport two memory channels and a single HT link. Socket C32 was superseded by {{\\|Socket SP3}}. ** Remote-Management Interface (SB-RMI)

...3+|AM3+}} which make a single HT link available. Socket G34 was superseded by {{\\|Socket SP3}}. ** Remote-Management Interface (SB-RMI)

| developer 3 = RMI | type = Microprocessor, System on a Chip

'''Socket SP5''' is a microprocessor socket designed by [[AMD]] for the fourth generation of their {{amd|EPYC#7004 Series (Zen 4)|E |{{amd|CPUID#Family 25 (19h)|Family 19h}} Models 10h–1Fh