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Difference between revisions of "marvell/armada"
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{{marvell title|ARMADA}}
 
{{marvell title|ARMADA}}
 
{{ic family
 
{{ic family
| extended family  = Yes
 
 
| title            = ARMADA
 
| title            = ARMADA
 
| image            =  
 
| image            =  
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| arch              = Consumer ARM-based SoCs
 
| arch              = Consumer ARM-based SoCs
 
| isa              = ARMv5
 
| isa              = ARMv5
| isa 2            = ARMv7
+
| isa 2             = ARMv6
 +
| isa 3             = ARMv7
 
| microarch        = Sheeva PJ1
 
| microarch        = Sheeva PJ1
 
| microarch 2      = Sheeva PJ4
 
| microarch 2      = Sheeva PJ4
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| successor link  =  
 
| successor link  =  
 
}}
 
}}
'''ARMADA''' is an extended family of consumer application {{arch|32}} [[ARM]] [[system on chips]] introduced by [[Marvell]] in late [[2009]] as a successor to the older {{marvell|PXA}} family which was acquired from [[Intel]].
+
'''ARMADA''' is a family of consumer application {{arch|32}} [[ARM]] [[system on chips]] introduced by [[Marvell]] in late [[2009]] as a successor to the older {{marvell|PXA}} family which was acquired from [[Intel]].
  
== Families ==
+
== Series ==
{{expand section}}
+
=== ARMADA 100 ===
 +
'''ARMADA 100''' was a series of {{arch|32}} [[ARM]] [[SoCs]] designed by [[Marvell]] for ultra-low power consumer devices such as digital photo frames, eBook readers, [[MID]]s, IP phones, and portable navigation devices. ARMADA 100 devices are all based on Marvell's {{marvell|Sheeva PJ1|l=arch}} microarchitecture manufactured on a [[55 nm process]].
 +
 
 +
=== ARMADA 500 ===
 +
'''ARMADA 500''' was a series of {{arch|32}} [[ARM]] [[SoCs]] designed by [[Marvell]] for high-performance consumer devices such [[smartbook]]s, [[MID]]s, [[netbooks]], and [[thin clients]]. ARMADA 500 devices are all based on Marvell's {{marvell|Sheeva PJ4|l=arch}} microarchitecture manufactured on a [[55 nm process]].
 +
 
 +
=== ARMADA 600 ===
 +
'''ARMADA 600''' was a series of {{arch|32}} [[ARM]] [[SoCs]] designed by [[Marvell]] for high-performance consumer mobile devices smartphones, point of sale terminals, handheld multimedia devices, and [[MID]]s. ARMADA 600 devices are all based on Marvell's {{marvell|Sheeva PJ4|l=arch}} microarchitecture manufactured on a [[55 nm process]].
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          If a microprocessor is missing from the list, an appropriate article for it needs to be
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          created and tagged accordingly.
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          Missing a chip? please dump its name here: http://en.wikichip.org/wiki/WikiChip:wanted_chips
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{{comp table start}}
 +
<table class="comptable sortable tc13 tc14 tc15 tc16 tc17 tc18 tc19">
 +
<tr class="comptable-header"><th>&nbsp;</th><th colspan="12">List of ARMADA 600-based Processors</th></tr>
 +
<tr class="comptable-header"><th>&nbsp;</th><th colspan="7">Main processor</th><th colspan="8">IGP</th></tr>
 +
{{comp table header 1|cols=Process, Launched, C, T, Frequency, Memory, Max Mem, Name, Frequency}}
 +
{{#ask: [[Category:microprocessor models by marvell]] [[instance of::microprocessor]] [[microprocessor family::ARMADA 600]]
 +
|?full page name
 +
|?model number
 +
|?process
 +
|?first launched
 +
|?core count
 +
|?thread count
 +
|?base frequency#GHz
 +
|?supported memory type
 +
|?max memory#GiB
 +
|?integrated gpu
 +
|?integrated gpu base frequency#MHz
 +
|format=template
 +
|template=proc table 3
 +
|userparam=11
 +
|mainlabel=-
 +
}}
 +
{{comp table count|ask=[[Category:microprocessor models by marvell]] [[instance of::microprocessor]] [[microprocessor family::ARMADA 600]]}}
 +
</table>
 +
{{comp table end}}
 +
 
 +
=== ARMADA 1000 ===
 +
 
 +
=== ARMADA 1500 ===
 +
 
 +
== See also ==
 +
* Intel {{intel|Atom}}

Revision as of 17:51, 28 May 2017

ARMADA
Developer Marvell
Manufacturer TSMC
Type System on Chips
Introduction October 19, 2009 (announced)
November, 2009 (launch)
Architecture Consumer ARM-based SoCs
ISA ARMv5, ARMv6, ARMv7
µarch Sheeva PJ1, Sheeva PJ4
Word size 32 bit
4 octets
8 nibbles
Process 55 nm
0.055 μm
5.5e-5 mm
Technology CMOS
Succession
PXA

ARMADA is a family of consumer application 32-bit ARM system on chips introduced by Marvell in late 2009 as a successor to the older PXA family which was acquired from Intel.

Series

ARMADA 100

ARMADA 100 was a series of 32-bit ARM SoCs designed by Marvell for ultra-low power consumer devices such as digital photo frames, eBook readers, MIDs, IP phones, and portable navigation devices. ARMADA 100 devices are all based on Marvell's Sheeva PJ1 microarchitecture manufactured on a 55 nm process.

ARMADA 500

ARMADA 500 was a series of 32-bit ARM SoCs designed by Marvell for high-performance consumer devices such smartbooks, MIDs, netbooks, and thin clients. ARMADA 500 devices are all based on Marvell's Sheeva PJ4 microarchitecture manufactured on a 55 nm process.

ARMADA 600

ARMADA 600 was a series of 32-bit ARM SoCs designed by Marvell for high-performance consumer mobile devices smartphones, point of sale terminals, handheld multimedia devices, and MIDs. ARMADA 600 devices are all based on Marvell's Sheeva PJ4 microarchitecture manufactured on a 55 nm process.

 List of ARMADA 600-based Processors
 Main processorIGP
ModelProcessLaunchedCTFrequencyMemoryMax MemNameFrequency
61055 nm
0.055 μm
5.5e-5 mm
5 January 2010111 GHz
1,000 MHz
1,000,000 kHz
DDR2-800 DDR3-10662 GiB
2,048 MiB
2,097,152 KiB
2,147,483,648 B
0.00195 TiB
GC860
61855 nm
0.055 μm
5.5e-5 mm
16 February 2010111 GHz
1,000 MHz
1,000,000 kHz
DDR3-1066 DDR2-8002 GiB
2,048 MiB
2,097,152 KiB
2,147,483,648 B
0.00195 TiB
GC860
62855 nm
0.055 μm
5.5e-5 mm
March 2011331.5 GHz
1,500 MHz
1,500,000 kHz
0.624 GHz
624 MHz
624,000 kHz
DDR3-1066 DDR2-800GC1000500 MHz
0.5 GHz
500,000 KHz
Count: 3

ARMADA 1000

ARMADA 1500

See also

Facts about "ARMADA - Marvell"
designerMarvell +
first announcedOctober 19, 2009 +
first launchedNovember 2009 +
full page namemarvell/armada +
instance ofsystem on a chip family +
instruction set architectureARMv5 +, ARMv6 + and ARMv7 +
main designerMarvell +
manufacturerTSMC +
microarchitectureSheeva PJ1 + and Sheeva PJ4 +
nameARMADA +
process55 nm (0.055 μm, 5.5e-5 mm) +
technologyCMOS +
word size32 bit (4 octets, 8 nibbles) +