• intel/mcs-80
  | caption = {{\|8080}}, the CPU of the MCS-80 system ...y [[Intel]]. Introduced on April, 1974, the MCS-80 featured the {{\|8080}} CPU, the forefather of all modern [[x86]]-based microprocessors.
  4 KB (406 words) - 16:10, 26 January 2019
• 32 nm lithography process
  | process 1 name = P1268 (CPU) / P1269 (SoC)
  10 KB (1,090 words) - 19:14, 8 July 2021
• 14 nm lithography process
  | process 1 name = P1272 (CPU) / P1273 (SoC) ...or performance and high frequency (e.g., high-switching circuitry in the [[CPU]]) whereas short cells are optimized for density (e.g., GPU shader arrays).
  17 KB (2,243 words) - 19:32, 25 May 2023
• 45 nm lithography process
  | colspan="2" | P1266 (CPU) / P1266.8 (SoC) / P1269 (SoC) || colspan="2" | CS-300 || colspan="2" | ||
  5 KB (602 words) - 05:51, 20 July 2018
• intel/microarchitectures/bonnell
  |atype=CPU ...tel turned to higher integration, moving [[integrated graphics|Graphics]], CPU core, Video Acceleration, [[Display Controller]], and [[Memory Controller]]
  38 KB (5,468 words) - 20:29, 23 May 2019
• intel/microarchitectures/saltwell
  | atype = CPU <tr><th colspan="8">CPU</th><th colspan="3">IGP</th></tr>
  7 KB (872 words) - 19:42, 30 November 2017
• intel/microarchitectures/silvermont
  | atype = CPU
  9 KB (1,160 words) - 09:35, 25 September 2019
• intel/microarchitectures/airmont
  | atype = CPU
  5 KB (568 words) - 19:40, 30 November 2017
• intel/microarchitectures/goldmont
  |atype=CPU
  7 KB (956 words) - 23:05, 23 March 2020
• intel/pentium (2009)
  <tr><th colspan="8">CPU</th><th colspan="3">IGP</th></tr> ...ated the [[integrated graphics]] on this same die as the newly architected CPU, allowing for higher performance and lower power than previous generation.
  20 KB (2,661 words) - 00:45, 11 October 2017
• intel/celeron
  <tr><th colspan="8">CPU</th><th colspan="3">IGP</th></tr>
  25 KB (3,201 words) - 03:13, 22 September 2018
• intel/xeon d
  All models are a single-chip solution, meaning both the [[CPU]] [[die]] and the [[chipset]] die are packaged together on the same substra All models are a single-chip solution, meaning both the [[CPU]] [[die]] and the [[chipset]] die are packaged together on the same substra
  13 KB (1,784 words) - 08:04, 6 April 2019
• intel/microarchitectures/broadwell (client)
  |atype=CPU ...l]] [[instance of::microprocessor]] [[microarchitecture::Broadwell]] [[max cpu count::1]]
  14 KB (1,891 words) - 14:37, 6 January 2022
• intel/microarchitectures/haswell (client)
  |atype=CPU ==== CPU changes ====
  27 KB (3,750 words) - 06:57, 18 November 2023
• intel/microarchitectures/ivy bridge (client)
  | atype = CPU * 4 CPU cores
  5 KB (689 words) - 13:44, 2 May 2020
• intel/microarchitectures/sandy bridge (client)
  |atype=CPU ...diagram from Intel. The master design incorporates the [[quad-core|four]] CPU [[physical cores|cores]], the [[GPU]] with 12 execution units, the 8 MiB sh
  84 KB (13,075 words) - 00:54, 29 December 2020
• intel/microarchitectures/westmere (client)
  | atype = CPU ...l]] [[instance of::microprocessor]] [[microarchitecture::Westmere ]] [[max cpu count::1]]
  10 KB (1,258 words) - 21:07, 9 March 2018
• intel/microarchitectures/nehalem (client)
  | atype = CPU
  4 KB (459 words) - 21:44, 26 December 2023
• intel/microarchitectures/p6
  | atype = CPU
  3 KB (325 words) - 21:34, 22 February 2020
• intel/microarchitectures/skylake (client)
  |atype=CPU **** Limits motherboard trace design to 7 inches max from the CPU to chipset (down from 8)
  79 KB (11,922 words) - 06:46, 11 November 2022

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