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  • This is a '''[[has type::number]]''' property representing the number of [[core]]s on the specific microprocessor or architecture.
    130 bytes (21 words) - 22:38, 7 April 2016
  • 104 bytes (19 words) - 19:18, 26 November 2017

Page text matches

  • c
    ...s very simple design, small number of {{\|reserved keywords|keywords}} and core constructs, and a very simple but still capable {{\|standard library}}. By | count = 2
    5 KB (790 words) - 13:36, 2 October 2017
  • | count = 5 |{{C|stdlib.h|<stdlib.h>}} || C89 || Provides core library functions such as memory management and random number generation.
    5 KB (818 words) - 15:28, 9 March 2016
  • | count = 1 | count = 1
    12 KB (1,182 words) - 13:35, 13 March 2022
  • |core = AVR ! Model Code !! Package !! Terminal Count
    1 KB (152 words) - 23:07, 17 December 2013
  • |core count=1 |thread count=1
    5 KB (748 words) - 21:37, 21 November 2021
  • {{intel title|Core i7}} | title = Intel Core i7
    43 KB (5,739 words) - 21:30, 22 April 2024
  • Crystal Well is a true 128MB [[L4 Cache|L4$]] which could be utilized by the core itself, not just by the [[Iris Pro]]'s [[framebuffer]]. I.E. L3$ values tha |?core count
    2 KB (371 words) - 02:53, 15 February 2017
  • |core = AVR ! Model Code !! Package !! Terminal Count
    2 KB (219 words) - 23:43, 17 December 2013
  • ...r a '''Microprocessing Unit''' ('''MPU''') is a device that implements the core elements of a computer system on a single [[integrated circuit]], or as a f * '''[[core count]]''' - the number of [[physical cores]] incorporated into the chip.
    8 KB (1,149 words) - 00:41, 16 September 2019
  • |core count=1 |thread count=1
    2 KB (257 words) - 16:31, 13 December 2017
  • |core count=1
    1 KB (178 words) - 16:24, 13 December 2017
  • | microarch 3 = Core ! Intro !! Family !! Process !! µarch !! Core Name !! Core Count
    13 KB (1,417 words) - 12:37, 22 December 2018
  • |core name=Genoa |core family=25
    4 KB (693 words) - 01:48, 2 April 2023
  • |core name=Genoa |core family=25
    4 KB (666 words) - 01:48, 2 April 2023
  • | count = 4 * {{intel|Core 2 Duo}}
    9 KB (1,150 words) - 00:03, 2 October 2022
  • {{title|Population Count (popcount)}}[[File:Popcount.svg|right]] ...e is the number of [[set bits]] in that value. For example, the population count of {{hex|0F0F}}, {{hex|1111}}, and {{hex|00}} are {{dec|8}}, {{dec|4}}, and
    3 KB (447 words) - 01:55, 14 March 2023
  • |core count=1
    322 bytes (36 words) - 16:13, 13 December 2017
  • | core count = 1
    6 KB (933 words) - 16:32, 13 December 2017
  • {{intel title|Core i7-4950HQ}} | name = Intel Core i7-4950HQ
    4 KB (404 words) - 16:22, 13 December 2017
  • {{intel title|Core i7-4960HQ}} | name = Intel Core i7-4960HQ
    3 KB (401 words) - 14:24, 12 February 2019
  • {{intel title|Core i7-4980HQ}} | name = Intel Core i7-4980HQ
    3 KB (399 words) - 16:22, 13 December 2017
  • {{intel title|Core i7-4850HQ}} | name = Intel Core i7-4850HQ
    3 KB (400 words) - 16:22, 13 December 2017
  • {{intel title|Core i7-4860HQ}} | name = Intel Core i7-4860HQ
    3 KB (399 words) - 16:22, 13 December 2017
  • {{intel title|Core i7-4870HQ}} |name=Intel Core i7-4870HQ
    3 KB (386 words) - 09:14, 26 December 2017
  • {{intel title|Core i7-4750HQ}} | name = Intel Core i7-4750HQ
    3 KB (401 words) - 16:22, 13 December 2017
  • {{intel title|Core i7-4760HQ}} | name = Intel Core i7-4760HQ
    3 KB (397 words) - 16:22, 13 December 2017
  • {{intel title|Core i7-4770HQ}} | name = Intel Core i7-4770HQ
    3 KB (398 words) - 16:22, 13 December 2017
  • {{intel title|Core i7-4770R}} | name = Intel Core i7-4770R
    4 KB (406 words) - 16:22, 13 December 2017
  • {{intel title|Core i5-4670R}} | name = Intel Core i5-4670R
    4 KB (404 words) - 16:19, 13 December 2017
  • {{intel title|Core i5-4570R}} | name = Intel Core i5-4570R
    3 KB (401 words) - 16:19, 13 December 2017
  • {{intel title|Core i7-4860EQ}} | name = Intel Core i7-4860EQ
    3 KB (396 words) - 16:22, 13 December 2017
  • {{intel title|Core i7-4850EQ}} | name = Intel Core i7-4850EQ
    3 KB (391 words) - 16:22, 13 December 2017
  • | core name = | core stepping = C0
    3 KB (399 words) - 16:27, 13 December 2017
  • |core name=Skylake U |core family=6
    4 KB (596 words) - 16:15, 13 December 2017
  • |core name=Skylake U |core family=6
    4 KB (596 words) - 16:15, 13 December 2017
  • {{intel title|Core i3-6098P}} |name=Core i3-6098P
    4 KB (627 words) - 16:17, 13 December 2017
  • {{intel title|Core i5-6402P}} |name=Core i5-6402P
    4 KB (627 words) - 16:20, 13 December 2017
  • {{intel title|Core i7-6498DU}} |name=Core i7-6498DU
    4 KB (640 words) - 02:21, 16 January 2019
  • {{intel title|Core i5-6198DU}} |name=Intel Core i5-6198DU
    4 KB (650 words) - 02:21, 16 January 2019
  • {{intel title|Core i7-5500DU}} | name = Intel Core i7-5500DU
    5 KB (469 words) - 16:22, 13 December 2017
  • {{intel title|Core i7-5950HQ}} | name = Intel Core i7-5950HQ
    4 KB (407 words) - 16:22, 13 December 2017
  • {{intel title|Core i7-5850HQ}} | name = Intel Core i7-5850HQ
    4 KB (401 words) - 16:22, 13 December 2017
  • {{intel title|Core i7-5850EQ}} | name = Intel Core i7-5850EQ
    4 KB (395 words) - 16:22, 13 December 2017
  • {{intel title|Core i7-5750HQ}} | name = Intel Core i7-5750HQ
    4 KB (424 words) - 16:22, 13 December 2017
  • {{intel title|Core i7-5775R}} | name = Intel Core i7-5775R
    4 KB (405 words) - 16:22, 13 December 2017
  • {{intel title|Core i7-5775C}} |name=Intel Core i7-5775C
    4 KB (460 words) - 15:03, 24 March 2019
  • {{intel title|Core i5-5675R}} | name = Intel Core i5-5675R
    4 KB (409 words) - 16:19, 13 December 2017
  • {{intel title|Core i5-5675C}} | name = Intel Core i5-5675C
    4 KB (454 words) - 18:17, 2 November 2019
  • {{intel title|Core i5-5575R}} | name = Intel Core i5-5575R
    4 KB (409 words) - 16:19, 13 December 2017
  • {{intel title|Core i5-5350H}} | name = Intel Core i5-5350H
    4 KB (415 words) - 16:19, 13 December 2017
  • ...is found in mid-range and high-end performance mobile ({{intel|Skylake U|l=core}}) processors. This GPU incorporates 64 MiB of [[eDRAM]] side cache on-chip |?core count
    4 KB (470 words) - 17:01, 9 July 2017
  • ...is found in mid-range and high-end performance mobile ({{intel|Skylake U|l=core}}) processors. This GPU incorporates 64 MiB of [[eDRAM]] side cache on-chip |?core count
    4 KB (475 words) - 06:43, 8 May 2018
  • {{intel title|Core i3-6167U}} |name=Core i3-6167U
    4 KB (631 words) - 16:18, 13 December 2017
  • {{intel title|Core i5-6287U}} |name=Core i5-6287U
    4 KB (649 words) - 16:20, 13 December 2017
  • | core name = P5600 | core stepping =
    3 KB (323 words) - 16:10, 13 December 2017
  • {{see also|intel/cores/silverthorne|l1=Silverthorne Core}} ...ose {{arch|32}} processors were based on the {{intel|Silverthorne|l=core}} core which were designed for the [[Mobile Internet Devices]] (MID) market. Silve
    17 KB (2,292 words) - 09:32, 16 July 2019
  • ==== Braswell Core ==== {{main|intel/cores/braswell|l1=Braswell Core}}
    5 KB (739 words) - 06:20, 26 October 2016
  • ==== Cherry Trail Core ==== {{main|intel/cores/cherry trail|l1=Cherry Trail Core}}
    4 KB (540 words) - 06:21, 26 October 2016
  • ...l=arch}} and Server/HEDT {{intel|Skylake SP|l=core}}/{{intel|Skylake X|X|l=core}} processors. | count = 4
    17 KB (2,243 words) - 19:32, 25 May 2023
  • | core name = Cherry Trail | core stepping = D1
    4 KB (462 words) - 16:15, 13 December 2017
  • | core name = Cherry Trail | core stepping = C0
    4 KB (472 words) - 16:15, 13 December 2017
  • |core name=Braswell |core stepping=D1
    4 KB (475 words) - 17:42, 27 March 2018
  • | core name = Cherry Trail | core stepping = C0
    5 KB (573 words) - 16:15, 13 December 2017
  • | core name = Cherry Trail | core stepping = D1
    5 KB (572 words) - 16:15, 13 December 2017
  • | core name = Cherry Trail | core stepping = D1
    6 KB (744 words) - 18:35, 14 January 2019
  • |core name=Cherry Trail |core stepping=D1
    5 KB (736 words) - 03:44, 19 August 2023
  • | core name = Cherry Trail | core stepping = D1
    5 KB (558 words) - 16:15, 13 December 2017
  • | core name = SoFIA | core stepping =
    4 KB (424 words) - 16:15, 13 December 2017
  • | core name = SoFIA | core stepping =
    4 KB (449 words) - 16:15, 13 December 2017
  • | core name = SoFIA | core stepping =
    4 KB (467 words) - 16:15, 13 December 2017
  • | core name = SoFIA | core stepping =
    4 KB (418 words) - 16:15, 13 December 2017
  • | core name = SoFIA | core stepping =
    4 KB (412 words) - 16:15, 13 December 2017
  • {{intel title|Braswell|core}} {{core
    4 KB (488 words) - 19:42, 5 October 2020
  • |l1i per=Core |l1d per=Core
    38 KB (5,468 words) - 20:29, 23 May 2019
  • | l1i per = Core | l1d per = Core
    9 KB (1,160 words) - 09:35, 25 September 2019
  • |?core count == Many-core ==
    3 KB (384 words) - 20:59, 8 February 2022
  • | l1i per = Core | l1d per = Core
    5 KB (568 words) - 19:40, 30 November 2017
  • |l1i per=Core |l1d per=Core
    7 KB (956 words) - 23:05, 23 March 2020
  • ...ced by [[Intel]] in 2009 after replacing the previous {{intel|Pentium Dual-Core}} family. ===== Arrandale Core =====
    20 KB (2,661 words) - 00:45, 11 October 2017
  • | microarch 3 = Core ...boost is generally not significant or present, and most Celerons are dual-core only. They also lack helpful features like hyper-threading, and have genera
    25 KB (3,201 words) - 03:13, 22 September 2018
  • |core name=Braswell |core stepping=D1
    4 KB (529 words) - 17:41, 27 March 2018
  • |core name=Braswell |core stepping=D1
    5 KB (701 words) - 17:40, 27 March 2018
  • |core name=Braswell |core stepping=C0
    4 KB (540 words) - 17:40, 27 March 2018
  • |core name=Braswell |core stepping=C0
    4 KB (544 words) - 17:43, 27 March 2018
  • |core name=Braswell |core stepping=C0
    4 KB (580 words) - 09:40, 8 July 2022
  • |core name=Braswell |core stepping=C0
    5 KB (724 words) - 06:10, 2 December 2018
  • |core name=Braswell |core stepping=C0
    4 KB (539 words) - 17:39, 27 March 2018
  • |core name=Braswell |core stepping=D1
    4 KB (535 words) - 17:39, 27 March 2018
  • |core name=Braswell |core stepping=D1
    5 KB (722 words) - 01:50, 24 November 2018
  • |core name=Braswell |core stepping=D1
    4 KB (533 words) - 17:41, 27 March 2018
  • |core name=Braswell |core stepping=D1
    4 KB (539 words) - 17:39, 27 March 2018
  • '''Xeon D''' is a family of {{arch|64}} multi-core [[x86]] [[microserver]] single-chip processors introduced by [[Intel]] in M | D-1500 || March, [[2015]] || {{intel|Broadwell DE|l=core}} || {{intel|Broadwell|l=arch}}
    13 KB (1,784 words) - 08:04, 6 April 2019
  • |core name=Broadwell DE |core family=6
    4 KB (593 words) - 02:17, 1 April 2019
  • |core name=Broadwell DE |core family=6
    4 KB (593 words) - 02:18, 1 April 2019
  • |core name=Broadwell DE |core family=6
    4 KB (582 words) - 02:21, 1 April 2019
  • |core name=Broadwell DE |core family=6
    4 KB (596 words) - 02:18, 1 April 2019
  • |core name=Broadwell DE |core family=6
    4 KB (595 words) - 02:16, 1 April 2019
  • |core name=Broadwell DE |core family=6
    4 KB (595 words) - 02:16, 1 April 2019
  • |core name=Broadwell DE |core family=6
    4 KB (593 words) - 02:17, 1 April 2019
  • |core name=Broadwell DE |core family=6
    4 KB (595 words) - 02:16, 1 April 2019

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