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NNP-I 1100 - Intel Nervana
| Edit Values | |
| NNP-I 1100 | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Model Number | NNP-I 1100 |
| Market | Server, Edge |
| Introduction | November 12, 2019 (announced) November 12, 2019 (launched) |
| Shop | Amazon |
| General Specs | |
| Family | NNP |
| Series | NNP-I |
| Microarchitecture | |
| Microarchitecture | Spring Hill, Sunny Cove |
| Process | 10 nm |
| Transistors | 8,500,000,000 |
| Technology | CMOS |
| Die | 239 mm² |
| Cores | 12 |
| Electrical | |
| TDP | 12 W |
| Packaging | |
NNP-I 1100 is an inference neural processor designed by Intel Nervana and introduced in late 2019. Fabricated on Intel's 10 nm process based on the Spring Hill microarchitecture, the NNP-I 1100 has 12 ICEs for a peak performance of 50 TOPS at a TDP of 12 W. This chip comes in an M.2 accelerator card form factor.
Nervana NNP-I 1100 M.2 accelerator card.
Peak Performance[edit]
The NNP-I 1100 has a peak performance of 50 TOPS50,000,000,000,000 OPS
50,000,000,000 KOPS
50,000,000 MOPS
50,000 GOPS
0.05 POPS
(Int8).
50,000,000,000 KOPS
50,000,000 MOPS
50,000 GOPS
0.05 POPS
Cache[edit]
- Main article: Spring Hill § Cache
- 3 MiB of tightly-coupled scratchpad memory
- 12 x 256 KiB/core
- 48 MiB Deep SRAM
- 4 MiB/ICE
- 24 MiB LLC
- 3 MiB/slice
Memory controller[edit]
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Integrated Memory Controller
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Die[edit]
- Main article: Spring Hill § Die
- 8,500,000,000 transistors
- 239 mm² die size
Product Brief[edit]
Facts about "NNP-I 1100 - Intel Nervana"
| back image | |
| core count | 12 + |
| designer | Intel + |
| die area | 239 mm² (0.37 in², 2.39 cm², 239,000,000 µm²) + |
| family | NNP + |
| first announced | November 12, 2019 + |
| first launched | November 12, 2019 + |
| full page name | nervana/nnp/nnp-i 1100 + |
| has ecc memory support | true + |
| instance of | microprocessor + |
| ldate | November 12, 2019 + |
| main image | |
| manufacturer | Intel + |
| market segment | Server + and Edge + |
| max memory bandwidth | 62.585 GiB/s (64,086.914 MiB/s, 67.2 GB/s, 67,200 MB/s, 0.0611 TiB/s, 0.0672 TB/s) + |
| microarchitecture | Spring Hill + and Sunny Cove + |
| model number | NNP-I 1100 + |
| name | NNP-I 1100 + |
| peak integer ops (8-bit) | 50,000,000,000,000 OPS (50,000,000,000 KOPS, 50,000,000 MOPS, 50,000 GOPS, 50 TOPS, 0.05 POPS, 5.0e-5 EOPS, 5.0e-8 ZOPS) + |
| process | 10 nm (0.01 μm, 1.0e-5 mm) + |
| series | NNP-I + |
| supported memory type | LPDDR4X-4200 + |
| tdp | 12 W (12,000 mW, 0.0161 hp, 0.012 kW) + |
| technology | CMOS + |
| transistor count | 8,500,000,000 + |