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Xeon Gold 6252 - Intel
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General Info | |
Microarchitecture |
Xeon Gold 6252 is a 64-bit 24-core x86 high performance server microprocessor introduced by Intel in early 2019. The Gold 6252 is based on the Cascade Lake microarchitecture and is manufactured on a 14 nm process. This chip supports 4-way multiprocessing, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor supports up 1 TiB of hexa-channel DDR4-2933 memory, operates at 2.1 GHz with a TDP of 150 W and features a turbo boost frequency of up to 3.7 GHz.
Contents
Cache
- Main article: Cascade Lake § Cache
The Xeon Gold 6252 features a larger non-default 35.75 MiB of L3, a size that would normally be found on a 26-core part.
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Expansions
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Expansion Options |
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Features
[Edit/Modify Supported Features]
Facts about "Xeon Gold 6252 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon Gold 6252 - Intel#pcie + |
full page name | intel/xeon gold/6252 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has advanced vector extensions 512 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions + and Deep Learning Boost + |
has intel deep learning boost | true + |
has intel enhanced speedstep technology | true + |
has intel speed shift technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
l1$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 24 MiB (24,576 KiB, 25,165,824 B, 0.0234 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 35.75 MiB (36,608 KiB, 37,486,592 B, 0.0349 GiB) + |
ldate | 1900 + |
max memory bandwidth | 131.13 GiB/s (134,277.12 MiB/s, 140.8 GB/s, 140,799.765 MB/s, 0.128 TiB/s, 0.141 TB/s) + |
max memory channels | 6 + |
supported memory type | DDR4-2933 + |