From WikiChip
ZhangJiang - Zhaoxin
< zhaoxin
Revision as of 01:43, 14 January 2018 by At32Hz (talk | contribs) (Created page with "{{zhaoxin title|ZhangJiang}} {{microarchitecture |atype=CPU |name=WuDaoKou |designer=Zhaoxin |manufacturer=TSMC |introduction=2015 |process=28 nm |cores=2 |cores 2=4 |cores 3=...")
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)

Edit Values
WuDaoKou µarch
General Info
Arch TypeCPU
DesignerZhaoxin
ManufacturerTSMC
Introduction2015
Process28 nm
Core Configs2, 4, 8
Pipeline
TypeSuperscalar
OoOEYes
SpeculativeYes
Reg RenamingYes
Instructions
ISAx86-64
Succession

ZhangJiang is the successor to Isaiah II, a 28 nm x86 microarchitecture designed by Zhaoxin for mainstream laptops, desktops, and servers.

Retrieved from "https://en.wikichip.org/w/index.php?title=zhaoxin/microarchitectures/zhangjiang&oldid=72428"
Facts about "ZhangJiang - Microarchitectures - Zhaoxin"
RDF feed
codenameWuDaoKou +
core count2 +, 4 + and 8 +
designerZhaoxin +
first launched2015 +
full page namezhaoxin/microarchitectures/zhangjiang +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerTSMC +
microarchitecture typeCPU +
nameWuDaoKou +
process28 nm (0.028 μm, 2.8e-5 mm) +