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From WikiChip
Skylake SP - Cores - Intel
< intel
| Edit Values | |
| Skylake SP | |
 | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | May 4, 2017 (announced) H2, 2017 (launched) |
| Microarchitecture | |
| ISA | x86-64 |
| Microarchitecture | Skylake |
| Word Size | 8 octets 64 bit16 nibbles |
| Process | 14 nm 0.014 μm 1.4e-5 mm |
| Technology | CMOS |
| Clock | 2.0 GHz - 3.6 GHz |
| Succession | |
Skylake SP is the code name for Intel's series of server multiprocessors based on the Skylake microarchitecture as part of the Purley platform. These chips support up to 8-way multiprocessing, up to 28 cores, and incorporate the AVX-512 x86 extension. Skylake SP-based chips are manufactured on a 14 nm process and utilize the Lewisburg chipset.
Facts about "Skylake SP - Cores - Intel"
| designer | Intel + |
| first announced | May 4, 2017 + |
| first launched | February 2017 + |
| instance of | core + |
| isa | x86-64 + |
| manufacturer | Intel + |
| microarchitecture | Skylake + |
| name | Skylake SP + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |