Template:mpu The Athlon MP 2000+ (OPN AMP2000DMS3C) based on the Palomino core was a 32-bit x86 multiprocessor developed by AMD and introduced in late 2001 for the server and workstation market. This MPU operated at 1.6 GHz with a FSB transfer rate of 266 MT/s (x12.5 multiplier). This processor, which was based on the K7 microarchitecture, was manufactured on a mature 180 nm copper interconnect technology at AMD's Fab 30 in Dresden, Germany.

Cache

Main article: K7 § Cache

Cache Info [Edit Values]
L1I$	64 KiB 65,536 B 0.0625 MiB	1x64 KiB 2-way set associative
L1D$	64 KiB 65,536 B 0.0625 MiB	1x64 KiB 2-way set associative
L2$	256 KiB 0.25 MiB 262,144 B 2.441406e-4 GiB	1x256 KiB 16-way set associative

Graphics

This MPU has no integrated graphics processing unit.

Features

• Advanced Configuration and Power Interface
  • Halt State
  • Stop Grant State

Documents

Datasheets

• AMD Athlon MP Processor Model 6 OPGA Data Sheet for Multiprocessor Platforms; Publication # 25480 Rev: D; Issue Date: June 2002.

Others

• System Considerations for Dual AMD Athlon MP Processors in Tower and 1U Form Factors; Publication # 25325; Rev: B; August 2002.