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From WikiChip
Property:instruction set architecture
381
U
This is a string property representing the instruction set architecture (ISA) of the system or chip.
Pages using the property "instruction set architecture"
Showing 25 pages using this property.
O | |
---|---|
OCTEON - Cavium + | MIPS64 + |
OLMS-40 - OKI + | OLMS-40 + |
OLMS-50 - OKI + | OLMS-50 + |
OLMS-60 - OKI + | OLMS-60 + |
OLMS-64 - OKI + | OLMS-64 + |
OLMS-65 - OKI + | OLMS-65 + |
Opteron - AMD + | x86 + |
P | |
P5 - Microarchitectures - Intel + | x86-32 + |
P6 - Microarchitectures - Intel + | x86-32 + |
Palm Cove - Microarchitectures - Intel + | x86-64 + |
Penryn - Microarchitectures - Intel + | x86-64 + |
Pentium Gold - Intel + | x86-64 + |
Pentium M - Microarchitectures - Intel + | x86-16 +, x86-32 + |
Pentium Silver - Intel + | x86-64 + |
Pentium - Intel + | IA-32 + |
Pentium - Intel + | x86-64 + |
Phenom II X2 - AMD + | x86-64 + |
Phenom II X3 - AMD + | x86-64 + |
Phenom II X4 - AMD + | x86-64 + |
Phenom II X6 - AMD + | x86-64 + |
Phenom X3 - AMD + | x86-64 + |
Phenom X4 - AMD + | x86-64 + |
Piledriver - Microarchitectures - AMD + | x86-64 + |
Post-K - Microarchitectures - Fujitsu + | ARMv8 + |
Poulson - Microarchitectures - Intel + | IA-64 + |
Retrieved from "https://en.wikichip.org/w/index.php?title=Property:instruction_set_architecture&oldid=99102#SMWResults"
Facts about "instruction set architecture"
Has type "Has type" is a predefined property that describes the datatype of a property and is provided by Semantic MediaWiki. | Text + |