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From WikiChip
Post-K - Microarchitectures - Fujitsu
< fujitsu
| Edit Values | |
| Post-K µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Fujitsu |
| Manufacturer | TSMC |
| Introduction | 2018 |
| Core Configs | 52 |
| Pipeline | |
| Type | Superscalar, Superpipeline |
| OoOE | Yes |
| Speculative | Yes |
| Reg Renaming | Yes |
| Instructions | |
| ISA | ARMv8 |
| Extensions | SVE |
Post-K is an ARM microarchitecture designed by Fujitsu for the Post-K
Architecture[edit]
Post-K is a custom-designed 64-bit ARM microprocessor.
- ARMv8-A
- SVE Extension
- Supports 512-bit vector operations
- SVE Extension
- Many-core Architecture
- 52-cores/chip
- 48 compute cores + assistant cores
- 52-cores/chip
- Memory
- 3D stacked DRAM (HBM 3/4?)
- Terabyte/s BW
- 3D stacked DRAM (HBM 3/4?)
Retrieved from "https://en.wikichip.org/w/index.php?title=fujitsu/microarchitectures/post-k&oldid=79580"
Facts about "Post-K - Microarchitectures - Fujitsu"
| codename | Post-K + |
| core count | 52 + |
| designer | Fujitsu + |
| first launched | 2018 + |
| full page name | fujitsu/microarchitectures/post-k + |
| instance of | microarchitecture + |
| instruction set architecture | ARMv8 + |
| manufacturer | TSMC + |
| microarchitecture type | CPU + |
| name | Post-K + |