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SX-Aurora - Microarchitectures - NEC
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Revision as of 20:50, 23 November 2018 by David (talk | contribs) (= Overview)

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SX-Aurora µarch
General Info
Arch TypeVPU
DesignerNEC
ManufacturerTSMC
Introduction2018
Core Configs8
Pipeline
TypeSuperscalar, Pipelined
OoOEYes
SpeculativeYes
Reg RenamingYes
Stages8
Decode4-way
Cache
L1I Cache32 KiB/core
L1D Cache32 KiB/core
L2 Cache256 KiB/core
L3 Cache16 MiB/chip
Succession

SX-Aurora is NEC's successor to the SX-ACE, a 16 nm microarchitecture for vector processors first introduced in 2018.

History

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Architecture

Key changes from SX-ACE

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Block Diagram

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Memory Hierarchy

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Overview

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Vector engine (VE) card

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Die

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Bibliography

  • Template:hcbib
  • Supercomputing 2018, NEC Aurora Forum
  • Some information was obtained directly from NEC