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SABRE - Intel Movidius
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General Info
Microarchitecture

SABRE was a test microprocessor designed by Movidius for the acceleration of machine vision. The SABRE microprocessor eventually lead to the production definition of the Myriad 1 line of vision accelerators.

Overview

SABRE is capable of 20 GLOPS at low 100s mW of power through the use of 9 execution units consisting of a SPARC V8 LEON3 core and 8 additional SHAVE v2.0 cores.

The test platform consisted of a Samsung 6410 daughtercard which incoluded an S3C6410X processor (ARM11) and a Movidius MV0108 SABRE daughtercard which had the SABRE processor.

movidius sabre test board.png

Block diagram

movidius sabre block diagram.png

References

  • Tite, Teodor, et al. "moviOS: a Real-Time Multiprocessor Operating System for Multimedia Applications."
Retrieved from "https://en.wikichip.org/w/index.php?title=movidius/sabre&oldid=75080"
Facts about "SABRE - Intel Movidius"
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base frequency180 MHz (0.18 GHz, 180,000 kHz) +
designerMovidius +
full page namemovidius/sabre +
instance ofmicroprocessor +
isaSPARC V8 + and SHAVE +
isa familySPARC + and SHAVE +
ldate1900 +
manufacturerTSMC +
market segmentEmbedded + and Mobile +
microarchitectureLEON3 + and SHAVE v2.0 +
model numberSABRE +
nameSABRE +
process65 nm (0.065 μm, 6.5e-5 mm) +
technologyCMOS +