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Xeon D-2166NT - Intel
Edit Values | |
Xeon D-2166NT | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | D-2166NT |
Part Number | FH8067303784301 |
S-Spec | SR3ZX |
Market | Server, Embedded |
Release Price | $1,005.00 |
Shop | Amazon |
General Specs | |
Family | Xeon D |
Series | D-2000 |
Locked | Yes |
Frequency | 2,000 MHz |
Turbo Frequency | 3,000 MHz (1 core) |
Bus type | DMI 3.0 |
Bus rate | 4 × 8 GT/s |
Clock multiplier | 20 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Skylake (server) |
Core Name | Skylake-DE |
Core Stepping | M1 |
Process | 14 nm |
Technology | CMOS |
MCP | Yes (2 dies) |
Word Size | 64 bit |
Cores | 12 |
Threads | 24 |
Max Memory | 512 GiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 85 W |
Xeon D-2166NT is a 64-bit dodeca-core high-performance x86 microserver processor set to be introduced by Intel in early 2018. Fabricated on Intel's 14nm+ process based on the Skylake microarchitecture, this chip operates at ? GHz with a TDP of ? W.
Contents
Cache
- Main article: Skylake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
Integrated Memory Controller
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Expansions
Expansion Options |
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Features
[Edit/Modify Supported Features]
Facts about "Xeon D-2166NT - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon D-2166NT - Intel#package + and Xeon D-2166NT - Intel#pcie + |
base frequency | 2,000 MHz (2 GHz, 2,000,000 kHz) + |
bus links | 4 + |
bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
bus type | DMI 3.0 + |
clock multiplier | 20 + |
core count | 12 + |
core name | Skylake-DE + |
core stepping | M1 + |
designer | Intel + |
die count | 2 + |
family | Xeon D + |
first announced | February 7, 2018 + |
first launched | February 7, 2018 + |
full page name | intel/xeon d/d-2166nt + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has advanced vector extensions 512 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Secure Key Technology +, OS Guard + and Identity Protection Technology + |
has intel enhanced speedstep technology | true + |
has intel identity protection technology support | true + |
has intel secure key technology | true + |
has intel speed shift technology | true + |
has intel supervisor mode execution protection | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
is multi-chip package | true + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 384 KiB (393,216 B, 0.375 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 16.5 MiB (16,896 KiB, 17,301,504 B, 0.0161 GiB) + |
ldate | February 7, 2018 + |
main image | + |
manufacturer | Intel + |
market segment | Server + and Embedded + |
max cpu count | 1 + |
max memory | 524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) + |
max memory bandwidth | 79.47 GiB/s (81,377.28 MiB/s, 85.33 GB/s, 85,330.263 MB/s, 0.0776 TiB/s, 0.0853 TB/s) + |
max memory channels | 4 + |
microarchitecture | Skylake (server) + |
model number | D-2166NT + |
name | Xeon D-2166NT + |
number of avx-512 execution units | 2 + |
package | FCBGA-2518 + |
part number | FH8067303784301 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 1,005.00 (€ 904.50, £ 814.05, ¥ 103,846.65) + |
s-spec | SR3ZX + |
series | D-2000 + |
smp max ways | 1 + |
supported memory type | DDR4-2666 + |
tdp | 85 W (85,000 mW, 0.114 hp, 0.085 kW) + |
technology | CMOS + |
thread count | 24 + |
turbo frequency (1 core) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |
x86/has memory protection extensions | true + |