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EPYC 7F52 - AMD
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EPYC 7F52
General Info
DesignerAMD
ManufacturerTSMC, GlobalFoundries
Model Number7F52
Part Number100-000000140,
100-000000140WOF
MarketServer
IntroductionApril 14, 2020 (announced)
April 14, 2020 (launched)
Release Price$3,100 (tray)
ShopAmazon
General Specs
FamilyEPYC
Series7002
LockedYes
Frequency3,500 MHz
Turbo Frequency3,900 MHz
Clock multiplier35
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureZen 2
Core NameRome
Core Family23
Process7 nm, 14 nm
TechnologyCMOS
MCPYes (9 dies)
Word Size64 bit
Cores16
Threads32
Max Memory4 TiB
Multiprocessing
Max SMP2-Way (Multiprocessor)
Electrical
TDP240 W
Packaging
PackageSP3, FCLGA-4094 (FC-OLGA)
Dimension75.4 mm × 58.5 mm × 6.26 mm
Pitch0.87 mm × 1 mm
Contacts4094
SocketSP3, LGA-4094

EPYC 7F52 is a 64-bit hexadeca-core x86 server microprocessor designed and introduced by AMD in mid-2020. This multi-chip processor, which is based on the Zen 2 microarchitecture, incorporates logic fabricated TSMC 7 nm process and I/O fabricated on GlobalFoundries 14 nm process. The 7F52 has a TDP of 240 W with a base frequency of 3.5 GHz and a boost frequency of up to 3.9 GHz. This processor supports up to two-way SMP and up to 4 TiB of eight channels DDR4-3200 memory per socket.

This 7F52 is a frequency-optimized SKU, specifically binned for higher base frequency.

Cache

Main article: Zen 2 § Cache

[Edit/Modify Cache Info]

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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$1 MiB
1,024 KiB
1,048,576 B
L1I$512 KiB
524,288 B
0.5 MiB
16x32 KiB8-way set associative 
L1D$512 KiB
524,288 B
0.5 MiB
16x32 KiB8-way set associative 

L2$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  16x512 KiB8-way set associativewrite-back

L3$256 MiB
262,144 KiB
268,435,456 B
0.25 GiB
  16x16 MiB  

Memory controller

[Edit/Modify Memory Info]

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Integrated Memory Controller
Max TypeDDR4-3200
Supports ECCYes
Max Mem4 TiB
Controllers8
Channels8
Max Bandwidth190.7 GiB/s
195,276.8 MiB/s
204.763 GB/s
204,762.566 MB/s
0.186 TiB/s
0.205 TB/s
Bandwidth
Single 23.84 GiB/s
Double 47.68 GiB/s
Quad 95.37 GiB/s
Hexa 143.1 GiB/s
Octa 190.7 GiB/s

Expansions

[Edit/Modify Expansions Info]

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Expansion Options
PCIeRevision: 4.0
Max Lanes: 128
Configuration: x16, x8


Features

[Edit/Modify Supported Features]

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Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
SSE4aStreaming SIMD Extensions 4a
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
SHASHA Extensions
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
SMTSimultaneous Multithreading
AMD-ViAMD-Vi (I/O MMU virtualization)
AMD-VAMD Virtualization
SMESecure Memory Encryption
TSMETransparent SME
SEVSecure Encrypted Virtualization
SenseMISenseMI Technology
Boost 2Precision Boost 2
Facts about "EPYC 7F52 - AMD"
base frequency3,500 MHz (3.5 GHz, 3,500,000 kHz) +
clock multiplier35 +
core count16 +
core family23 +
core nameRome +
designerAMD +
die count9 +
familyEPYC +
first announcedApril 14, 2020 +
first launchedApril 14, 2020 +
full page nameamd/epyc/7f52 +
has locked clock multipliertrue +
instance ofmicroprocessor +
is multi-chip packagetrue +
isax86-64 +
isa familyx86 +
ldateApril 14, 2020 +
manufacturerTSMC + and GlobalFoundries +
market segmentServer +
max cpu count2 +
max memory4,194,304 MiB (4,294,967,296 KiB, 4,398,046,511,104 B, 4,096 GiB, 4 TiB) +
microarchitectureZen 2 +
model number7F52 +
nameEPYC 7F52 +
packageSP3 + and FCLGA-4094 +
process7 nm (0.007 μm, 7.0e-6 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) +
series7002 +
smp max ways2 +
socketSP3 + and LGA-4094 +
tdp240 W (240,000 mW, 0.322 hp, 0.24 kW) +
technologyCMOS +
thread count32 +
turbo frequency3,900 MHz (3.9 GHz, 3,900,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +