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Xeon Platinum 9282 - Intel
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Xeon Platinum 9282
cascade lake ap (front).png
General Info
DesignerIntel
ManufacturerIntel
Model Number9282
MarketServer, HPC
IntroductionApril 2, 2019 (announced)
April 2, 2019 (launched)
ShopAmazon
General Specs
FamilyXeon Platinum
Series9200
LockedYes
Frequency2,600 MHz
Turbo Frequency3,800 MHz (1 core)
Bus typeDMI 3.0
Bus rate4 × 8 GT/s
Clock multiplier26
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureCascade Lake
PlatformWalker Pass
ChipsetLewisburg
Core NameCascade Lake AP
Core Family6
Process14 nm
TechnologyCMOS
MCPYes (2 dies)
Word Size64 bit
Cores56
Threads112
Max Memory2 TiB
Multiprocessing
Max SMP2-Way (Multiprocessor)
Electrical
TDP400 W
Packaging
PackageFCBGA-5903 (BGA)
Pitch0.99 mm
Contacts5903

Xeon Platinum 9282 is a 56-core 64-bit high-performance x86 server microprocessor introduced by Intel in early 2019. The 9282 is based on the Cascade Lake microarchitecture and is fabricated on Intel's 14 nm process. It operates at 2.6 GHz with a TDP of 400 W and a turbo boost of up to 3.8 GHz. This processor supports up to twelve channels of DDR4-2933 memory.

This processor cannot be purchased independently and is only sold as part of Intel's S9200WK Compute Module.

Cache

Main article: Cascade Lake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$3.5 MiB
3,584 KiB
3,670,016 B
L1I$1.75 MiB
1,792 KiB
1,835,008 B
56x32 KiB8-way set associative 
L1D$1.75 MiB
1,792 KiB
1,835,008 B
56x32 KiB8-way set associativewrite-back

L2$56 MiB
57,344 KiB
58,720,256 B
0.0547 GiB
  56x1 MiB16-way set associativewrite-back

L3$77 MiB
78,848 KiB
80,740,352 B
0.0752 GiB
  56x1.375 MiB11-way set associativewrite-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2933
Supports ECCYes
Max Mem2 TiB
Controllers4
Channels12
Max Bandwidth262.26 GiB/s
268,554.24 MiB/s
281.6 GB/s
281,599.531 MB/s
0.256 TiB/s
0.282 TB/s
Bandwidth
Single 21.86 GiB/s
Double 43.71 GiB/s
Quad 87.42 GiB/s
Octa 174.84 GiB/s

Expansions

[Edit/Modify Expansions Info]

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Expansion Options
PCIeRevision: 3.0
Max Lanes: 40
Configuration: 1x16, 2x8, 1x8+2x4


Features

[Edit/Modify Supported Features]

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Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
AVX-512Advanced Vector 512-bit
AVX512FAVX-512 Foundation
AVX512CDAVX-512 Conflict Detection
AVX512BWAVX-512 Byte and Word
AVX512DQAVX-512 Doubleword and Quadword Instructions
AVX512VLAVX-512 Vector Length
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
SSTSpeed Shift Technology
TXTTrusted Execution Technology (SMX)
vProIntel vPro
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
VMDVolume Management Device
NMNode Manager
KPTKey Protection Technology
PTTPlatform Trust Technology
Run SureRun Sure Technology (RAS Capability)
MBE CtrlMode-Based Execute Control
Node CtrlrNode Controller Support
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Xeon Platinum 9282 - Intel#pcie +
base frequency2,600 MHz (2.6 GHz, 2,600,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
chipsetLewisburg +
clock multiplier26 +
core count56 +
core family6 +
core nameCascade Lake AP +
designerIntel +
die count2 +
familyXeon Platinum +
first announcedApril 2, 2019 +
first launchedApril 2, 2019 +
full page nameintel/xeon platinum/9282 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has advanced vector extensions 512true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Transactional Synchronization Extensions +
has intel enhanced speedstep technologytrue +
has intel speed shift technologytrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
is multi-chip packagetrue +
isax86-64 +
isa familyx86 +
l1$ size3,584 KiB (3,670,016 B, 3.5 MiB) +
l1d$ description8-way set associative +
l1d$ size1,792 KiB (1,835,008 B, 1.75 MiB) +
l1i$ description8-way set associative +
l1i$ size1,792 KiB (1,835,008 B, 1.75 MiB) +
l2$ description16-way set associative +
l2$ size56 MiB (57,344 KiB, 58,720,256 B, 0.0547 GiB) +
l3$ description11-way set associative +
l3$ size77 MiB (78,848 KiB, 80,740,352 B, 0.0752 GiB) +
ldateApril 2, 2019 +
main imageFile:cascade lake ap (front).png +
manufacturerIntel +
market segmentServer + and HPC +
max cpu count2 +
max memory2,097,152 MiB (2,147,483,648 KiB, 2,199,023,255,552 B, 2,048 GiB, 2 TiB) +
max memory bandwidth262.26 GiB/s (268,554.24 MiB/s, 281.6 GB/s, 281,599.531 MB/s, 0.256 TiB/s, 0.282 TB/s) +
max memory channels12 +
microarchitectureCascade Lake +
model number9282 +
nameXeon Platinum 9282 +
packageFCBGA-5903 +
platformWalker Pass +
process14 nm (0.014 μm, 1.4e-5 mm) +
series9200 +
smp max ways2 +
supported memory typeDDR4-2933 +
tdp400 W (400,000 mW, 0.536 hp, 0.4 kW) +
technologyCMOS +
thread count112 +
turbo frequency (1 core)3,800 MHz (3.8 GHz, 3,800,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +