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Xeon W-3175X - Intel
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Xeon W-3175X
General Info
DesignerIntel
ManufacturerIntel
Model NumberW-3175X
MarketWorkstation
IntroductionOctober 8, 2018 (announced)
October 19, 2018 (launched)
ShopAmazon
General Specs
FamilyXeon W
SeriesW-3000
LockedNo
Frequency3,100 MHz
Turbo Frequency4,300 MHz (1 core)
Bus typeDMI 3.0
Bus rate4 × 8 GT/s
Clock multiplier31
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureSkylake (server)
PlatformBasin Falls
Core NameSkylake W
Core Family6
Process14 nm
TechnologyCMOS
Word Size64 bit
Cores28
Threads56
Max Memory512 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP255 W
Packaging
PackageFCLGA-3647 (FCLGA)
Dimension76.16 mm × 56.6 mm
Pitch0.8585 mm × 0.9906 mm
Contacts3647
SocketSocket P, LGA-3647

W-3175X is a 64-bit 28-core x86 enterprise performance workstation microprocessor introduced by Intel in 2018. This processors, which is fabricated on an enhanced 14nm++ process based on the Skylake server microarchitecture, operates at 3.1 GHz with a TDP of 255 W and a turbo boost frequency of up to 4.3 GHz. This chip supports up to 512 GiB of hexa-channel DDR4-2666 ECC memory.

DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.


Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$1.75 MiB
1,792 KiB
1,835,008 B
L1I$896 KiB
917,504 B
0.875 MiB
28x32 KiB8-way set associative 
L1D$896 KiB
917,504 B
0.875 MiB
28x32 KiB8-way set associativewrite-back
L2$28 MiB
28,672 KiB
29,360,128 B
0.0273 GiB
  28x1 MiB16-way set associativewrite-back
L3$38.5 MiB
39,424 KiB
40,370,176 B
0.0376 GiB
  28x1.375 MiB11-way set associativewrite-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2666
Supports ECCYes
Max Mem512 GiB
Controllers2
Channels6
Max Bandwidth119.21 GiB/s
122,071.04 MiB/s
128.001 GB/s
128,000.763 MB/s
0.116 TiB/s
0.128 TB/s
Bandwidth
Single 19.87 GiB/s
Double 39.74 GiB/s
Quad 79.47 GiB/s
Hexa 119.21 GiB/s

Expansions

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 64
Configuration: x16, x8, x4, x1


Features

[Edit/Modify Supported Features]

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Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
AVX-512Advanced Vector 512-bit (2 Units)
AVX512FAVX-512 Foundation
AVX512CDAVX-512 Conflict Detection
AVX512BWAVX-512 Byte and Word
AVX512DQAVX-512 Doubleword and Quadword Instructions
AVX512VLAVX-512 Vector Length
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
HTHyper-Threading
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
SSTSpeed Shift Technology
TXTTrusted Execution Technology (SMX)
vProIntel vPro
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
MPXMemory Protection Extensions
Secure KeySecure Key Technology
SMEPOS Guard Technology
VMDVolume Management Device
IPTIdentity Protection Technology
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_w/w-3175x&oldid=83351"
Facts about "Xeon W-3175X - Intel"
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Xeon W-3175X - Intel#pcie +
base frequency3,100 MHz (3.1 GHz, 3,100,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
chipsetLewisburg +
clock multiplier31 +
core count28 +
core family6 +
core nameSkylake SP +
core steppingH0 +
designerIntel +
familyXeon W +
first announcedOctober 8, 2018 +
first launchedJanuary 30, 2019 +
full page nameintel/xeon w/w-3175x +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has advanced vector extensions 512true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Secure Key Technology +, OS Guard + and Identity Protection Technology +
has intel enhanced speedstep technologytrue +
has intel identity protection technology supporttrue +
has intel secure key technologytrue +
has intel speed shift technologytrue +
has intel supervisor mode execution protectiontrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multiplierfalse +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size1,792 KiB (1,835,008 B, 1.75 MiB) +
l1d$ description8-way set associative +
l1d$ size896 KiB (917,504 B, 0.875 MiB) +
l1i$ description8-way set associative +
l1i$ size896 KiB (917,504 B, 0.875 MiB) +
l2$ description16-way set associative +
l2$ size28 MiB (28,672 KiB, 29,360,128 B, 0.0273 GiB) +
l3$ description11-way set associative +
l3$ size38.5 MiB (39,424 KiB, 40,370,176 B, 0.0376 GiB) +
ldateJanuary 30, 2019 +
manufacturerIntel +
market segmentWorkstation +
max cpu count1 +
max memory524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) +
max memory bandwidth119.21 GiB/s (122,071.04 MiB/s, 128.001 GB/s, 128,000.763 MB/s, 0.116 TiB/s, 0.128 TB/s) +
max memory channels6 +
microarchitectureSkylake (server) +
model numberW-3175X +
nameXeon W-3175X +
number of avx-512 execution units2 +
packageFCLGA-3647 +
part numberBX80673W3175X + and CD8067304237800 +
platformPurley +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 2,999.00 (€ 2,699.10, £ 2,429.19, ¥ 309,886.67) +
release price (tray)$ 2,999.00 (€ 2,699.10, £ 2,429.19, ¥ 309,886.67) +
s-specSRF6L +
seriesW-3000 +
smp max ways1 +
socketSocket P + and LGA-3647 +
supported memory typeDDR4-2666 +
tdp255 W (255,000 mW, 0.342 hp, 0.255 kW) +
technologyCMOS +
thread count56 +
turbo frequency (1 core)4,300 MHz (4.3 GHz, 4,300,000 kHz) +
turbo frequency (28 cores)3,800 MHz +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +