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Vulcan µarch
General Info
Arch Type	CPU
Designer	Broadcomm
Manufacturer	TSMC
Introduction	2018
Process	16 nm
Core Configs	16, 20, 24, 28, 30, 32
Pipeline
Type	Superscalar, Superpipeline
OoOE	Yes
Speculative	Yes
Reg Renaming	Yes
Stages	13-15
Decode	4-way
Instructions
ISA	ARMv8.1
Extensions	NEON
Cache
L1I Cache	32 KiB/core 8-way set associative
L1D Cache	32 KiB/core 8-way set associative
L2 Cache	256 KiB/core 8-way set associative
L3 Cache	1 MiB/core

Vulcan is a 16 nm high-performance 64-bit ARM microarchitecture designed by Broadcom and later Cavium for the server market.

Introduced in 2018, Vulcan-based microprocessors are branded as part of the ThunderX2 family.

Architecture

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Block Diagram

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Memory Hierarchy

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Overview

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Core

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Die

• Broadcom's original die size was around 600 mm². It's unknown how much the die has changed when it was modified by Cavium.
• TSMC's 16 nm process

All Vulcan Chips

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References

• Some information was obtained directly from Broadcom
• Some information was obtained directly from Cavium

See also

• Qualcomm's Falkor
• Intel's Skylake