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Drive Xavier - Nvidia
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Drive Xavier
General Info
DesignerNvidia
ManufacturerTSMC
MarketArtificial Intelligence
IntroductionJanuary 8, 2018 (announced)
General Specs
SeriesDrive
Microarchitecture
ISAARMv8 (ARM)
Process12 nm
Transistors9,000,000,000
TechnologyCMOS
Die350 mm²
Word Size64 bit
Cores8
Threads8
Electrical
TDP30 W
TDP (Typical)20 W

Drive Xavier is a 64-bit ARM high-performance autonomous machine SoC designed by NVIDIA and introduced in 2018.

Overview

The Drive Xavier is an autonomous machine system on chip designed by NVIDIA and introduced at CES 2018. Silicon came back in the last week of December 2017 with sampling started in the first quarter of 2018. NVIDIA plans on mass production by the end of the year. NVIDIA reported that the product is a result of $2 billion R&D and 8,000 engineering hours.

Die

  • 9,000,000,000 transistors
  • 350 mm² die size
  • TSMC's 12FFN
Facts about "Tegra Xavier - Nvidia"
core count8 +
core nameCarmel +
designerNvidia +
die area350 mm² (0.543 in², 3.5 cm², 350,000,000 µm²) +
familyTegra +
first announcedJanuary 8, 2018 +
first launchedJune 2018 +
full page namenvidia/tegra/xavier +
has ecc memory supporttrue +
instance ofmicroprocessor +
isaARMv8 +
isa familyARM +
ldateJune 2018 +
main imageFile:xavier soc chip.png +
manufacturerTSMC +
market segmentArtificial Intelligence + and Embedded +
max cpu count4 +
max memory bandwidth127.1 GiB/s (130,150.4 MiB/s, 136.473 GB/s, 136,472.586 MB/s, 0.124 TiB/s, 0.136 TB/s) +
max memory channels8 +
microarchitectureCarmel + and Volta +
model numberTegra194 +
nameXavier +
process12 nm (0.012 μm, 1.2e-5 mm) +
smp max ways4 +
supported memory typeLPDDR4X-4266 +
tdp30 W (30,000 mW, 0.0402 hp, 0.03 kW) +
tdp (typical)20 W (20,000 mW, 0.0268 hp, 0.02 kW) +
technologyCMOS +
thread count8 +
transistor count9,000,000,000 +
word size64 bit (8 octets, 16 nibbles) +