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Difference between revisions of "intel/microarchitectures/rocket lake"
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{{microarchitecture | {{microarchitecture | ||
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|designer=Intel | |designer=Intel |
Revision as of 12:04, 20 November 2021
Edit Values | |
Rocket Lake µarch | |
General Info | |
Arch Type | CPU |
Designer | Intel |
Manufacturer | Intel |
Introduction | March 16, 2021 |
Process | 14 nm |
Core Configs | 4, 6, 8 |
Pipeline | |
Type | Superscalar, Superpipeline |
OoOE | Yes |
Speculative | Yes |
Reg Renaming | Yes |
Stages | 14-19 |
Decode | 5-way |
Instructions | |
ISA | x86-64 |
Extensions | MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA3, F16C, BMI, BMI2, VT-x, VT-d, TXT, TSX, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVE, SGX, MPX, AVX512F, SHA |
Cache | |
L1I Cache | 48 KiB/core 12-way set associative |
L1D Cache | 32 KiB/core 8-way set associative |
L2 Cache | 512 KiB/core 8-way set associative |
L3 Cache | 2 MiB/core 16-way set associative |
Cores | |
Core Names | Cypress Cove |
Succession | |
Contemporary | |
Tiger Lake |
Rocket Lake (RKL) is a microarchitecture designed by Intel as a successor to Comet Lake for desktops and single-socket servers.
Contents
Codenames
Core | Description | Graphics | Target |
---|---|---|---|
Rocket Lake S | Mainstream performance | GT2 | Desktop performance to value, AiOs, and minis |
Rocket Lake U | Ultra-low power | GT2 | Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room |
Brands
Intel has released Rocket Lake under the following brand families:
Logo | Family | General Description | Differentiating Features | ||||||
---|---|---|---|---|---|---|---|---|---|
Cores | HT | AVX | AVX2 | AVX512 | TVB | ECC | |||
Core i5 | Mid-range Performance | Hexa | ✔ | ✔ | ✔ | ✔ | ✘ | ✘ | |
Core i7 | High-end Performance | Octa | ✔ | ✔ | ✔ | ✔ | ✘ | ✘ | |
50px | Core i9 | High-end Performance | Octa | ✔ | ✔ | ✔ | ✔ | ✔ | ✘ |
50px | Xeon | 1S Server & Workstation | 4-8 | ✔ | ✔ | ✔ | ✔ | ✘ | ✔ |
Release Dates
Rocket Lake was officially introduced on March 16, 2021 and went on sale from March 30, 2021. Limited quantities of the Core i7-11700K were (accidentally?) available through the German reseller Mindfactory on March 6, 2021.
The Xeon W-1300 Line using Rocket Lake is expected to be officially launched in Q3/2021.
Compatibility
This section is empty; you can help add the missing info by editing this page. |
Rocket Lake will feature the same LGA1200 socket as Comet Lake. Rocket Lake is backwards compatible with Comet Lake. Rocket Lake will have new motherboards and a new 500 series chipset. Rocket Lake will not be compatible with Alder Lake.
Compiler support
Compiler | Arch-Specific | Arch-Favorable |
---|---|---|
ICC | -march=? |
-mtune=?
|
GCC | -march=rocketlake |
-mtune=rocketlake
|
LLVM | -march=? |
-mtune=?
|
Visual Studio | /arch:AVX512 |
/?
|
CPUID
- Further information: Intel CPUIDs
Core | Extended Family |
Family | Extended Model |
Model | Stepping |
---|---|---|---|---|---|
S | 0 | 0x6 | 0xA | 0x7 | 0x0-0x1 |
Family 6 Model 167 Stepping 0-1 Stepping: A0=0, B0=1 |
Architecture
Key changes from Comet Lake
- Core
- Display
- DisplayPort 1.4a (from DisplayPort 1.2)
- HDMI 2.0b (from HDMI 1.4b)
- I/O
- PCIe 4.0 (from 3.0)
- Memory
- Faster memory for mainstream desktops (i.e., Rocket Lake S) DDR4-3200 (from DDR4-2933)
- Chipset
- 400 Series chipset → 500 Series chipset
- 2.5G Ethernet (Foxville) support
- Integrated WiFi 6 AX201 (GiG+) support via CNVi
- 400 Series chipset → 500 Series chipset
- Packaging
- Die thinning on top-end SKUs for better heat removal
See also
Facts about "Rocket Lake - Microarchitectures - Intel"
codename | Rocket Lake + |
core count | 4 +, 6 + and 8 + |
designer | Intel + |
first launched | March 16, 2021 + |
full page name | intel/microarchitectures/rocket lake + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Rocket Lake + |
pipeline stages (max) | 19 + |
pipeline stages (min) | 14 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |