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== Overview ==
 
== Overview ==
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CHA is an [[x86]] SoC designed by [[Centaur]] for the server, edge, and AI market. Fabricated on TSMC [[16 nm process]], the chip integrates 8 new high-performance [[x86]] "CNS" cores [[ring interconnect|interconnected on a ring]] along with a high-performance "NCORE" [[neural processor]]. This chip is the first server x86 chip to integrate an AI accelerator right on-die and is designed to reduce the dependency on AI acceleration through additional hardware in order to simplify the platform and cost.
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The CHA SoC incorporates both the [[source bridge]] and [[north bridge]] on-die. The chip supports for up to quad-channel DDR4 memory and up to 44 PCIe Gen 3 lanes. Additionally, CHA supports the ability directly link to a second CHA SoC in a 2-way multiprocessing configuration.
  
 
== CNS Core ==
 
== CNS Core ==

Revision as of 22:00, 22 January 2020

Edit Values
CHA µarch
General Info
Arch TypeCPU
DesignerCentaur Technology
ManufacturerTSMC
Process16 nm
Core Configs8
Instructions
ISAx86-64

CHA is a 16-nanometer x86 SoC microarchitecture designed by Centaur Technology for the server market.

Process technology

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Architecture

Key changes from CN

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Block Diagram

CHA SoC

cha soc block diagram.svg

CNS Core

cns block diagram.svg

NCORE NPU

Overview

CHA is an x86 SoC designed by Centaur for the server, edge, and AI market. Fabricated on TSMC 16 nm process, the chip integrates 8 new high-performance x86 "CNS" cores interconnected on a ring along with a high-performance "NCORE" neural processor. This chip is the first server x86 chip to integrate an AI accelerator right on-die and is designed to reduce the dependency on AI acceleration through additional hardware in order to simplify the platform and cost.

The CHA SoC incorporates both the source bridge and north bridge on-die. The chip supports for up to quad-channel DDR4 memory and up to 44 PCIe Gen 3 lanes. Additionally, CHA supports the ability directly link to a second CHA SoC in a 2-way multiprocessing configuration.

CNS Core

New text document.svg This section is empty; you can help add the missing info by editing this page.

NCORE NPU

New text document.svg This section is empty; you can help add the missing info by editing this page.

Die

SoC

cha soc.png

Core group

cha core group.png

NCORE

cha soc ncore.png
cha soc ncore (2).png

Bibliography

  • Centaur. personal communication. November 2019.

See also