From WikiChip
					
    Difference between revisions of "intel/xeon gold/5218n"    
                	
														|  (Created page with "{{intel title|Xeon Gold 5218N}} {{chip}} '''Xeon Gold 5218N''' is a {{arch|64}} 16-core x86 high performance server microprocessor introduced by Intel in early 2...") | |||
| Line 1: | Line 1: | ||
| {{intel title|Xeon Gold 5218N}} | {{intel title|Xeon Gold 5218N}} | ||
| − | {{chip}} | + | {{chip | 
| + | |name=Xeon Gold 5218N | ||
| + | |image=cascade lake sp (front).png | ||
| + | |designer=Intel | ||
| + | |manufacturer=Intel | ||
| + | |model number=5218N | ||
| + | |part number=CD8069504289900 | ||
| + | |s-spec=SRFD9 | ||
| + | |market=Server | ||
| + | |first announced=April 2, 2019 | ||
| + | |first launched=April 2, 2019 | ||
| + | |release price (tray)=$1,375.00 | ||
| + | |family=Xeon Gold | ||
| + | |series=5200 | ||
| + | |locked=Yes | ||
| + | |frequency=2,300 MHz | ||
| + | |bus type=DMI 3.0 | ||
| + | |bus links=4 | ||
| + | |bus rate=8 GT/s | ||
| + | |clock multiplier=23 | ||
| + | |cpuid=0x50655 | ||
| + | |isa=x86-64 | ||
| + | |isa family=x86 | ||
| + | |microarch=Cascade Lake | ||
| + | |platform=Purley | ||
| + | |chipset=Lewisburg | ||
| + | |core name=Cascade Lake SP | ||
| + | |core family=6 | ||
| + | |core stepping=L1 | ||
| + | |process=14 nm | ||
| + | |technology=CMOS | ||
| + | |word size=64 bit | ||
| + | |core count=16 | ||
| + | |thread count=32 | ||
| + | |max cpus=4 | ||
| + | |max memory=1 TiB | ||
| + | |tdp=105 W | ||
| + | |package name 1=intel,fclga_3647 | ||
| + | }} | ||
| '''Xeon Gold 5218N''' is a {{arch|64}} [[16-core]] [[x86]] high performance server microprocessor introduced by [[Intel]] in early [[2019]]. The Gold 5218N is based on the {{intel|Cascade Lake|l=arch}} microarchitecture and is manufactured on a [[14 nm process]]. This chip supports 4-way multiprocessing, sports one {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect|UPI}} links. This microprocessor supports up 1 TiB of hexa-channel DDR4-2666 memory, operates at 2.3 GHz with a TDP of 105 W and features a {{intel|turbo boost}} frequency of up to 3.7 GHz. | '''Xeon Gold 5218N''' is a {{arch|64}} [[16-core]] [[x86]] high performance server microprocessor introduced by [[Intel]] in early [[2019]]. The Gold 5218N is based on the {{intel|Cascade Lake|l=arch}} microarchitecture and is manufactured on a [[14 nm process]]. This chip supports 4-way multiprocessing, sports one {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect|UPI}} links. This microprocessor supports up 1 TiB of hexa-channel DDR4-2666 memory, operates at 2.3 GHz with a TDP of 105 W and features a {{intel|turbo boost}} frequency of up to 3.7 GHz. | ||
Revision as of 01:22, 4 April 2019
| Edit Values | |
| Xeon Gold 5218N | |
|  | |
| General Info | |
| Designer | Intel | 
| Manufacturer | Intel | 
| Model Number | 5218N | 
| Part Number | CD8069504289900 | 
| S-Spec | SRFD9 | 
| Market | Server | 
| Introduction | April 2, 2019 (announced) April 2, 2019 (launched) | 
| Release Price | $1,375.00 (tray) | 
| Shop | Amazon | 
| General Specs | |
| Family | Xeon Gold | 
| Series | 5200 | 
| Locked | Yes | 
| Frequency | 2,300 MHz | 
| Bus type | DMI 3.0 | 
| Bus rate | 4 × 8 GT/s | 
| Clock multiplier | 23 | 
| CPUID | 0x50655 | 
| Microarchitecture | |
| ISA | x86-64 (x86) | 
| Microarchitecture | Cascade Lake | 
| Platform | Purley | 
| Chipset | Lewisburg | 
| Core Name | Cascade Lake SP | 
| Core Family | 6 | 
| Core Stepping | L1 | 
| Process | 14 nm | 
| Technology | CMOS | 
| Word Size | 64 bit | 
| Cores | 16 | 
| Threads | 32 | 
| Max Memory | 1 TiB | 
| Multiprocessing | |
| Max SMP | 4-Way (Multiprocessor) | 
| Electrical | |
| TDP | 105 W | 
| Packaging | |
| Package | FCLGA-3647 (FCLGA) | 
| Dimension | 76.16 mm × 56.6 mm | 
| Pitch | 0.8585 mm × 0.9906 mm | 
| Contacts | 3647 | 
| Socket | Socket P, LGA-3647 | 
Xeon Gold 5218N is a 64-bit 16-core x86 high performance server microprocessor introduced by Intel in early 2019. The Gold 5218N is based on the Cascade Lake microarchitecture and is manufactured on a 14 nm process. This chip supports 4-way multiprocessing, sports one AVX-512 FMA units as well as three UPI links. This microprocessor supports up 1 TiB of hexa-channel DDR4-2666 memory, operates at 2.3 GHz with a TDP of 105 W and features a turbo boost frequency of up to 3.7 GHz.
Facts about "Xeon Gold 5218N  - Intel"
| base frequency | 2,300 MHz (2.3 GHz, 2,300,000 kHz) + | 
| bus links | 4 + | 
| bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + | 
| bus type | DMI 3.0 + | 
| chipset | Lewisburg + | 
| clock multiplier | 23 + | 
| core count | 16 + | 
| core family | 6 + | 
| core name | Cascade Lake SP + | 
| core stepping | L1 + | 
| cpuid | 0x50655 + | 
| designer | Intel + | 
| family | Xeon Gold + | 
| first announced | April 2, 2019 + | 
| first launched | April 2, 2019 + | 
| full page name | intel/xeon gold/5218n + | 
| has locked clock multiplier | true + | 
| instance of | microprocessor + | 
| isa | x86-64 + | 
| isa family | x86 + | 
| ldate | April 2, 2019 + | 
| main image |  + | 
| manufacturer | Intel + | 
| market segment | Server + | 
| max cpu count | 4 + | 
| max memory | 1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) + | 
| microarchitecture | Cascade Lake + | 
| model number | 5218N + | 
| name | Xeon Gold 5218N + | 
| package | FCLGA-3647 + | 
| part number | CD8069504289900 + | 
| platform | Purley + | 
| process | 14 nm (0.014 μm, 1.4e-5 mm) + | 
| release price | $ 1,375.00 (€ 1,237.50, £ 1,113.75, ¥ 142,078.75) + | 
| release price (tray) | $ 1,375.00 (€ 1,237.50, £ 1,113.75, ¥ 142,078.75) + | 
| s-spec | SRFD9 + | 
| series | 5200 + | 
| smp max ways | 4 + | 
| socket | Socket P + and LGA-3647 + | 
| tdp | 105 W (105,000 mW, 0.141 hp, 0.105 kW) + | 
| technology | CMOS + | 
| thread count | 32 + | 
| word size | 64 bit (8 octets, 16 nibbles) + |